50 Commits

Author SHA1 Message Date
Bing Wen
09c9f64b8e Add missing clock check 2024-11-27 17:44:03 +08:00
Bing Wen
52ab015fac Add new 2024-11-27 12:23:13 +08:00
Bing Wen
8eaa3c8fd3 Add new feature to enable overclocking 2024-11-26 12:46:20 +08:00
Alexandros Liarokapis
2b7e76efe9 Fix dma nvic issues on dual core lines
This commit addresses #3256 by disabling dma NVIC interrupt enablement at startup.
Instead, per-channel NVIC interrupt enablement is now done with the rest of the dma channel configuration.
This ensures that each core will only handle the interrupts of the DMA channels that it uses.
2024-08-17 16:54:41 +03:00
Aurélien Jacobs
ec6cfc1f21 stm32: ensure the core runs on HSI clock while setting up rcc 2024-05-27 17:31:29 +02:00
Dario Nieuwenhuis
b4567bb8c5 stm32/rcc: g4: consistent PllSource, add pll pqr limits, simplify a bit. 2024-03-04 00:04:06 +01:00
Dario Nieuwenhuis
95234cddba stm32: autogenerate mux config for all chips. 2024-03-01 23:54:37 +01:00
Barnaby Walters
b091ffcb55 [embassy-stm32] G4 RCC refactor amendments and additions
* Added assertions for a variety of clock frequencies, based on the reference manual and
  stm32g474 datasheet. The family and numbers are consistent enough that I’m assuming
  these numbers will work for the other chips.
* Corrected value of pll1_q in set_clocks call, added pll1_r value
2024-02-23 01:59:24 +01:00
Barnaby Walters
6d7458dac7 Refinements
* Implemented boost mode dance (RM0440 p234-245, 6.5.1)
* Enabled boost mode in usb_serial example, tested on hardware
* Removed hard requirement of a valid 48MHz source (HSI48 is checked if
  requested, PLL passed through as-is and assumed to be valid)
* Used calc_pclk to calculate APB frequencies
* Refactored 48MHz configuration code to remove unnecessary let and block
* Renamed ahb_freq to hclk for clarity and consistency
2024-02-17 00:30:16 +01:00
Barnaby Walters
a24087c36c Configured SYSCLK after boost mode, added comments 2024-02-16 21:52:58 +01:00
Barnaby Walters
e465dacf73 Added documentation, fixed and refined boost and flash read latency config 2024-02-16 21:34:12 +01:00
Barnaby Walters
25a95503f6 Configured HSI48 if enabled, assert is enabled if chosen as clk48 source 2024-02-16 20:41:04 +01:00
Barnaby Walters
ae74833999 Removed redundant HSI48 configuration 2024-02-16 20:32:35 +01:00
Barnaby Walters
32e4c93954 Removed dangling doc comments 2024-02-16 19:58:19 +01:00
Barnaby Walters
396041ad1a Commented out currently unused constants 2024-02-16 00:04:35 +01:00
Barnaby Walters
5b7eff6541 [embassy-stm32]: started stm32g4 RCC refactor
* Copied API from f.rs where applicable
* HSE and HSI independantly configurable
* Boost mode set by user rather
* Added HSE, pll1_q and pll1_p frequencies to set_clocks call
* Stubbed max module based on f.rs, needs cleanup
2024-02-15 23:56:26 +01:00
Dario Nieuwenhuis
9866847375 stm32: autogenerate clocks struct, enable mux for all chips. 2024-02-02 23:24:34 +01:00
Tomasz bla Fortuna
03ba45065e Add FDCAN clock registers to G4 RCC.
Author: Adam Morgan <adam@luci.com>

Break definitions out of bxcan that can be used innm fdcan.

Typo
2024-01-31 05:40:05 +10:00
Dario Nieuwenhuis
4051aead0f stm32: update stm32-metapac. Fixes USB on STM32WB. 2023-12-08 23:45:12 +01:00
Dario Nieuwenhuis
c27459c052 Update stm32-metapac. 2023-12-08 20:07:59 +01:00
Dario Nieuwenhuis
4fe344ebc0 stm32/rcc: consistent casing and naming for PLL enums. 2023-11-13 00:52:01 +01:00
Dario Nieuwenhuis
0272deb158 stm32/rcc: add shared code for hsi48 with crs support. 2023-11-05 23:52:54 +01:00
Dario Nieuwenhuis
412bcad2d1 stm32: rename HSI16 -> HSI 2023-10-22 22:39:55 +02:00
Dario Nieuwenhuis
aff77d2b65 stm32/rng: add test. 2023-10-16 05:35:29 +02:00
xoviat
b24520579a rcc: ahb/apb -> hclk/pclk 2023-10-15 19:51:35 -05:00
xoviat
4a156df7a1 stm32: expand rcc mux to g4 and h7 2023-10-14 23:33:57 -05:00
pbert
ecdd7c0e2f enable clock first 2023-10-12 11:04:44 +02:00
pbert
f65a96c541 STM32: combine RccPeripherals reset() and enable() to reset_and_enable() 2023-10-12 11:04:19 +02:00
Dario Nieuwenhuis
b91d1eaca0 stm32/rcc: add LSE/LSI to all chips, add RTC to more chips. 2023-10-11 04:12:38 +02:00
Dario Nieuwenhuis
0cfa8d1bb5 stm32/rcc: use more PLL etc enums from PAC. 2023-10-11 00:12:33 +02:00
Dario Nieuwenhuis
6186fe0807 stm32/rcc: use PLL enums from PAC. 2023-10-09 02:48:22 +02:00
xoviat
de2773afdd stm32/rcc: convert bus prescalers to pac enums 2023-09-16 17:41:11 -05:00
xoviat
7622d2eb61 stm32: fix merge issues 2023-09-05 17:10:15 -05:00
Daehyeok Mun
49ba9c3da2 initial support for STM32G4 ADC 2023-09-04 23:36:41 -07:00
xoviat
48085939e7 stm32/rcc: rename common to bus 2023-08-27 08:35:13 -05:00
xoviat
a8a491212b stm32/rcc: cleanup merge 2023-07-30 10:18:54 -05:00
xoviat
2f18770e27 stm32/rcc: extract and combine ahb/apb prescalers 2023-07-30 09:52:30 -05:00
Kevin Lannen
5666c56903 STM32G4: Add CRS support to RCC
Create working CRS USB Example
2023-06-28 16:53:16 -06:00
Kevin Lannen
c94ba84892 stm32g4: PLL: Add support for configuring PLL_P and PLL_Q 2023-06-14 10:44:51 -06:00
Carl St-Laurent
8ddeaddc67
Rename to follow ref manual and CubeIDE 2023-06-08 20:46:48 -04:00
Carl St-Laurent
4185c10bf8
Cleanup 2023-06-04 12:09:03 -04:00
Carl St-Laurent
ade46489f1
Added Vcore boost mode and Flash wait state 2023-06-04 11:57:42 -04:00
Carl St-Laurent
6fe853a7d3
Better comments 2023-06-04 10:58:44 -04:00
Carl St-Laurent
2f269f3256
stm32/rcc: Implement basic PLL support for STM32G4 series 2023-06-03 22:05:24 -04:00
Rasmus Melchior Jacobsen
963f3e3059 Align with updated stm32 metapac 2023-05-25 16:06:02 +02:00
Grant Miller
5ecbe5c918 embassy-stm32: Simplify time
- Remove unused `MilliSeconds`, `MicroSeconds`, and `NanoSeconds` types
- Remove `Bps`, `KiloHertz`, and `MegaHertz` types that were only used
for converting to `Hertz`
- Replace all instances of `impl Into<Hertz>` with `Hertz`
- Add `hz`, `khz`, and `mhz` methods to `Hertz`, as well as
free function shortcuts
- Remove `U32Ext` extension trait
2022-07-10 21:46:45 -05:00
chemicstry
1fd5022e72 Refactor IWDG to use LSI frequency from RCC 2022-07-10 20:59:36 +03:00
Dario Nieuwenhuis
a8703b7598 Run rustfmt. 2022-06-12 22:22:31 +02:00
Dario Nieuwenhuis
2eb0cc5df7 stm32/rcc: remove Rcc struct, RccExt trait.
All the RCC configuration is executed in init().
2022-01-05 00:00:44 +01:00
Dario Nieuwenhuis
b06e705a73 stm32/rcc: change family-specific code from dirs to single files.
Consistent with how other peripherals handle their versions.
2022-01-04 19:28:15 +01:00