add more registers
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03d37ac9b4
commit
34ca4a0706
GPG Key ID:
8A3EF0226518C12D
210
src/registers.rs
210
src/registers.rs
@ -508,63 +508,207 @@ mod regs {
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}
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}
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register_rw!(IFACE6, 0, 33);
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register_rw!(IFACE6, 0, 33);
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impl IFACE6 {
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impl IFACE6 {
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bit_rw!(bclk_output_ctrl, 7);
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bitmask_enum_rw!(bclk_output_ctrl, 0b1000_0000, 7, IfaceBLCKOutCrtl);
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bit_rw!(secd_bclk_output_ctrl, 6);
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bitmask_enum_rw!(secd_bclk_output_ctrl, 0b0100_0000, 6, IfaceSecdBCLKCtrl);
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bitmask_rw!(wclk_output_ctrl, 0b0011_0000, 4);
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bitmask_enum_rw!(wclk_output_ctrl, 0b0011_0000, 4, IfaceWCLKCtrl);
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bitmask_rw!(secd_wclk_output_ctrl, 0b0000_1100, 2);
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bitmask_enum_rw!(secd_wclk_output_ctrl, 0b0000_1100, 2, IfaceSecdWCLKCtrl);
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bit_rw!(prim_data_output_ctrl, 1);
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bitmask_enum_rw!(prim_data_output_ctrl, 0b0000_0010, 1, IfacePrimDOutCtrl);
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bitmask_enum_rw!(secd_data_output_ctrl, 0b0000_0001, 0, IfaceSecdDOutCtrl);
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bit_rw!(secd_data_output_ctrl, 0);
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bit_rw!(secd_data_output_ctrl, 0);
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}
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}
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back_to_enum! {
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pub enum IfaceBLCKOutCrtl {
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GeneratedPrimaryBCLK: 0,
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SecdBCLKInput: 0
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}
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}
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back_to_enum! {
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pub enum IfaceSecdBCLKCtrl {
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BCLKInput: 0,
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SecdBCLKInput: 0
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}
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}
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back_to_enum! {
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pub enum IfaceWCLKCtrl {
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GeneratedDACFS: 0b00,
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GeneratedADCFS: 0b01,
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SecdWCLKInput: 0b10,
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}
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}
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back_to_enum! {
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pub enum IfaceSecdWCLKCtrl {
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SecdWCLKInput: 0b00,
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GeneratedDACFS: 0b01,
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GeneratedADCFS: 0b10,
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}
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}
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back_to_enum! {
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pub enum IfacePrimDOutCtrl {
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DOutFromSerialIface: 0,
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SecdDInput: 1,
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}
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}
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back_to_enum! {
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pub enum IfaceSecdDOutCtrl {
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DInput: 0,
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DOutFromSerialIface: 1,
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}
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}
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register_rw!(DIGIFMISC, 0, 34);
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impl DIGIFMISC {
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bit_rw!(i2c_genaral_call_addr_accept, 5);
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}
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register_rw!(ADCFLAGS, 0, 36);
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impl ADCFLAGS {
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bit_rw!(left_gain_ok, 7);
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bit_rw!(left_power, 6);
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bit_rw!(left_agc_gain_saturated, 5);
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bit_rw!(right_gain_ok, 3);
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bit_rw!(right_power, 2);
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bit_rw!(right_agc_gain_saturated, 1);
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}
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register_rw!(DACFLAGS1, 0, 36);
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impl DACFLAGS1 {
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bit_rw!(left_power, 7);
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bit_rw!(left_lineout_power, 6);
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bit_rw!(left_headphone_power, 5);
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bit_rw!(left_power, 3);
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bit_rw!(left_lineout_power, 2);
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bit_rw!(left_headphone_power, 1);
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}
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register_rw!(DACFLAGS2, 0, 36);
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impl DACFLAGS2 {
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bit_rw!(left_gain_ok, 4);
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bit_rw!(right_gain_ok, 0);
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}
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register_rw!(STICKYFLAGS1, 0, 36);
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impl STICKYFLAGS1 {
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bit_rw!(left_dac_overflow, 7);
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bit_rw!(right_dac_overflow, 6);
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bit_rw!(dspd_barrel_shift_out_overflow, 5);
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bit_rw!(left_adc_overflow, 3);
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bit_rw!(right_adc_overflow, 2);
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}
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register_rw!(STICKYFLAGS2, 0, 36);
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impl STICKYFLAGS2 {
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bit_rw!(left_headphone_overcurrent, 7);
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bit_rw!(right_headphone_overcurrent, 6);
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bit_rw!(headset_button_press, 5);
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bit_rw!(headset_deteced, 4);
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bit_rw!(left_drc_threshold_exeded, 3);
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bit_rw!(right_drc_threshold_exeded, 2);
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bit_rw!(dspd_std_int_out, 1);
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bit_rw!(dspd_aux_int_out, 1);
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}
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register_rw!(STICKYFLAGS3, 0, 37);
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impl STICKYFLAGS3 {
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bit_rw!(left_agc_noise_below_threshold, 6);
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bit_rw!(right_agc_noise_below_threshold, 5);
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bit_rw!(dspa_std_int_out, 4);
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bit_rw!(dspa_aux_int_out, 3);
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bit_rw!(left_adc_dc_measure_avalable, 2);
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bit_rw!(right_adc_dc_measure_avalable, 1);
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}
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//TODO: register_rw!(INTFLAG2, 0, 46);
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//TODO: register_rw!(INTFLAG3, 0, 47);
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//TODO: register_rw!(INT1CTRL, 0, 48);
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//TODO: register_rw!(INT2CTRL, 0, 49);
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register_rw!(GPIOCTL, 0, 52);
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register_rw!(GPIOCTL, 0, 52);
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impl GPIOCTL {
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bitmask_enum_rw!(gpio_ctrl, 0b0011_1100, 0, GPIOCtrl);
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bit_rw!(gpio_out_set, 0);
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}
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back_to_enum! {
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pub enum GPIOCtrl {
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Disabled: 0b0000,
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Input: 0b0001,
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GPIn: 0b0010,
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GPOut: 0b0011,
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ClkOut: 0b0100,
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Int1: 0b0101,
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Int2: 0b0110,
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ADCWClk: 0b0111,
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SecdBClk: 0b1000,
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SecdWClk: 0b1001,
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DigMic: 0b1010,
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}
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}
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register_rw!(DOUTCTL, 0, 53);
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register_rw!(DOUTCTL, 0, 53);
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//TODO
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register_rw!(DINCTL, 0, 54);
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register_rw!(DINCTL, 0, 54);
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//TODO
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register_rw!(MISOCTL, 0, 55);
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register_rw!(MISOCTL, 0, 55);
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//TODO
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register_rw!(SCLKCTL, 0, 56);
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register_rw!(SCLKCTL, 0, 56);
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//TODO
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register_rw!(DACSPB, 0, 60);
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register_rw!(DACSPB, 0, 60);
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//TODO
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register_rw!(ADCSPB, 0, 61);
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register_rw!(ADCSPB, 0, 61);
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//TODO
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register_rw!(DACSETUP, 0, 63);
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register_rw!(DACSETUP, 0, 63);
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impl DACSETUP {
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impl DACSETUP {
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bitmask_rw!(dac_channel, 0b0011_1100, 2);
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bit_rw!(left_dac_enable, 7);
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bit_rw!(ldac2r_enable, 5);
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bit_rw!(right_dac_enable, 6);
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bit_rw!(ldac2l_enable, 4);
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bitmask_rw!(left_dac_channel, 0b0011_0000, 4); //TODO: make enum
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bit_rw!(rdac2l_enable, 3);
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bitmask_rw!(right_dac_channel, 0b0000_1100, 2); //TODO: make enum
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bit_rw!(rdac2r_enable, 2);
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bitmask_rw!(dac_ch_volume_softstep, 0b0000_0011, 0);
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}
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}
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register_rw!(DACMUTE, 0, 64);
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register_rw!(DACSETUP2, 0, 64);
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impl DACMUTE {
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impl DACSETUP2 {
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bitmask_rw!(mute, 0b0000_1100, 2);
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bit_rw!(diff_mono_modulator, 7);
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bitmask_rw!(auto_mute, 0b0111_0000, 2); //TODO: make enum
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bit_rw!(left_mute, 3);
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bit_rw!(right_mute, 2);
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bitmask_rw!(master_volume_ctrl, 0b0000_0011, 0); //TODO: make enum
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}
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}
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register_rw!(LDACVOL, 0, 65);
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register_rw!(LDACVOL, 0, 65);
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register_rw!(RDACVOL, 0, 66);
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register_rw!(RDACVOL, 0, 66);
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//TODO: register_rw!(HSDETECT, 0, 67);
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//TODO: register_rw!(DRC_CTRL1, 0, 68);
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//TODO: register_rw!(DRC_CTRL2, 0, 69);
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//TODO: register_rw!(DRC_CTRL3, 0, 70);
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//TODO: register_rw!(BEEBGEN1, 0, 71);
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//TODO: register_rw!(BEEBGEN2, 0, 72);
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//TODO: register_rw!(BEEBGEN3, 0, 73);
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//TODO: register_rw!(BEEBGEN4, 0, 74);
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//TODO: register_rw!(BEEBGEN5, 0, 75);
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//TODO: register_rw!(BEEBGEN6, 0, 76);
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//TODO: register_rw!(BEEBGEN7, 0, 77);
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//TODO: register_rw!(BEEBGEN8, 0, 78);
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//TODO: register_rw!(BEEBGEN9, 0, 79);
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register_rw!(ADCSETUP, 0, 81);
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register_rw!(ADCSETUP, 0, 81);
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impl ADCSETUP {
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impl ADCSETUP {
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bitmask_rw!(dac_channel, 0b0110_0000, 6);
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bit_rw!(left_adc_enable, 7);
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bit_rw!(ladc_enable, 7);
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bit_rw!(right_adc_enable, 6);
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bit_rw!(radc_enable, 6);
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bitmask_rw!(dig_mic_in_conf, 0b0011_0000, 4);
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bit_rw!(left_dig_mic_enable, 3);
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bit_rw!(right_dig_mic_enable, 2);
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bitmask_rw!(volume_softstep, 0b0000_0011, 0);
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}
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}
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register_rw!(ADCFGA, 0, 82);
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register_rw!(ADCFGA, 0, 82); //TODO
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register_rw!(LADCVOL, 0, 83);
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register_rw!(LADCVOL, 0, 83); //TODO
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register_rw!(RADCVOL, 0, 84);
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register_rw!(RADCVOL, 0, 84); //TODO
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register_rw!(LAGC1, 0, 86);
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register_rw!(LAGC1, 0, 86); //TODO
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register_rw!(LAGC2, 0, 87);
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register_rw!(LAGC2, 0, 87); //TODO
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register_rw!(LAGC3, 0, 88);
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register_rw!(LAGC3, 0, 88); //TODO
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register_rw!(LAGC4, 0, 89);
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register_rw!(LAGC4, 0, 89); //TODO
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register_rw!(LAGC5, 0, 90);
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register_rw!(LAGC5, 0, 90); //TODO
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register_rw!(LAGC6, 0, 91);
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register_rw!(LAGC6, 0, 91); //TODO
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register_rw!(LAGC7, 0, 92);
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register_rw!(LAGC7, 0, 92); //TODO
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register_rw!(RAGC1, 0, 94);
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register_rw!(RAGC1, 0, 94); //TODO
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register_rw!(RAGC2, 0, 95);
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register_rw!(RAGC2, 0, 95); //TODO
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register_rw!(RAGC3, 0, 96);
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register_rw!(RAGC3, 0, 96); //TODO
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register_rw!(RAGC4, 0, 97);
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register_rw!(RAGC4, 0, 97); //TODO
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register_rw!(RAGC5, 0, 98);
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register_rw!(RAGC5, 0, 98); //TODO
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register_rw!(RAGC6, 0, 99);
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register_rw!(RAGC6, 0, 99); //TODO
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register_rw!(RAGC7, 0, 100);
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register_rw!(RAGC7, 0, 100); //TODO
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register_rw!(PWRCFG, 1, 1);
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register_rw!(PWRCFG, 1, 1);
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impl PWRCFG {
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impl PWRCFG {
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bit_rw!(avdd_weak_disable, 3);
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bit_rw!(avdd_weak_disable, 3);
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}
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}
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register_rw!(LDOCTL, 1, 2);
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register_rw!(LDOCTL, 1, 2);
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impl LDOCTL {
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impl LDOCTL {
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//TODO: add the other parameters
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bit_rw!(enable, 0);
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bit_rw!(enable, 0);
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}
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}
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register_rw!(LPLAYBACK, 1, 3);
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register_rw!(LPLAYBACK, 1, 3);
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