diff --git a/src/registers.rs b/src/registers.rs index ba07720..2678ff8 100644 --- a/src/registers.rs +++ b/src/registers.rs @@ -508,63 +508,207 @@ mod regs { } register_rw!(IFACE6, 0, 33); impl IFACE6 { - bit_rw!(bclk_output_ctrl, 7); - bit_rw!(secd_bclk_output_ctrl, 6); - bitmask_rw!(wclk_output_ctrl, 0b0011_0000, 4); - bitmask_rw!(secd_wclk_output_ctrl, 0b0000_1100, 2); - bit_rw!(prim_data_output_ctrl, 1); + bitmask_enum_rw!(bclk_output_ctrl, 0b1000_0000, 7, IfaceBLCKOutCrtl); + bitmask_enum_rw!(secd_bclk_output_ctrl, 0b0100_0000, 6, IfaceSecdBCLKCtrl); + bitmask_enum_rw!(wclk_output_ctrl, 0b0011_0000, 4, IfaceWCLKCtrl); + bitmask_enum_rw!(secd_wclk_output_ctrl, 0b0000_1100, 2, IfaceSecdWCLKCtrl); + bitmask_enum_rw!(prim_data_output_ctrl, 0b0000_0010, 1, IfacePrimDOutCtrl); + bitmask_enum_rw!(secd_data_output_ctrl, 0b0000_0001, 0, IfaceSecdDOutCtrl); bit_rw!(secd_data_output_ctrl, 0); } + back_to_enum! { + pub enum IfaceBLCKOutCrtl { + GeneratedPrimaryBCLK: 0, + SecdBCLKInput: 0 + } + } + back_to_enum! { + pub enum IfaceSecdBCLKCtrl { + BCLKInput: 0, + SecdBCLKInput: 0 + } + } + back_to_enum! { + pub enum IfaceWCLKCtrl { + GeneratedDACFS: 0b00, + GeneratedADCFS: 0b01, + SecdWCLKInput: 0b10, + } + } + back_to_enum! { + pub enum IfaceSecdWCLKCtrl { + SecdWCLKInput: 0b00, + GeneratedDACFS: 0b01, + GeneratedADCFS: 0b10, + } + } + back_to_enum! { + pub enum IfacePrimDOutCtrl { + DOutFromSerialIface: 0, + SecdDInput: 1, + } + } + back_to_enum! { + pub enum IfaceSecdDOutCtrl { + DInput: 0, + DOutFromSerialIface: 1, + } + } + register_rw!(DIGIFMISC, 0, 34); + impl DIGIFMISC { + bit_rw!(i2c_genaral_call_addr_accept, 5); + } + register_rw!(ADCFLAGS, 0, 36); + impl ADCFLAGS { + bit_rw!(left_gain_ok, 7); + bit_rw!(left_power, 6); + bit_rw!(left_agc_gain_saturated, 5); + bit_rw!(right_gain_ok, 3); + bit_rw!(right_power, 2); + bit_rw!(right_agc_gain_saturated, 1); + } + register_rw!(DACFLAGS1, 0, 36); + impl DACFLAGS1 { + bit_rw!(left_power, 7); + bit_rw!(left_lineout_power, 6); + bit_rw!(left_headphone_power, 5); + bit_rw!(left_power, 3); + bit_rw!(left_lineout_power, 2); + bit_rw!(left_headphone_power, 1); + } + register_rw!(DACFLAGS2, 0, 36); + impl DACFLAGS2 { + bit_rw!(left_gain_ok, 4); + bit_rw!(right_gain_ok, 0); + } + register_rw!(STICKYFLAGS1, 0, 36); + impl STICKYFLAGS1 { + bit_rw!(left_dac_overflow, 7); + bit_rw!(right_dac_overflow, 6); + bit_rw!(dspd_barrel_shift_out_overflow, 5); + bit_rw!(left_adc_overflow, 3); + bit_rw!(right_adc_overflow, 2); + } + register_rw!(STICKYFLAGS2, 0, 36); + impl STICKYFLAGS2 { + bit_rw!(left_headphone_overcurrent, 7); + bit_rw!(right_headphone_overcurrent, 6); + bit_rw!(headset_button_press, 5); + bit_rw!(headset_deteced, 4); + bit_rw!(left_drc_threshold_exeded, 3); + bit_rw!(right_drc_threshold_exeded, 2); + bit_rw!(dspd_std_int_out, 1); + bit_rw!(dspd_aux_int_out, 1); + } + register_rw!(STICKYFLAGS3, 0, 37); + impl STICKYFLAGS3 { + bit_rw!(left_agc_noise_below_threshold, 6); + bit_rw!(right_agc_noise_below_threshold, 5); + bit_rw!(dspa_std_int_out, 4); + bit_rw!(dspa_aux_int_out, 3); + bit_rw!(left_adc_dc_measure_avalable, 2); + bit_rw!(right_adc_dc_measure_avalable, 1); + } + //TODO: register_rw!(INTFLAG2, 0, 46); + //TODO: register_rw!(INTFLAG3, 0, 47); + //TODO: register_rw!(INT1CTRL, 0, 48); + //TODO: register_rw!(INT2CTRL, 0, 49); register_rw!(GPIOCTL, 0, 52); + impl GPIOCTL { + bitmask_enum_rw!(gpio_ctrl, 0b0011_1100, 0, GPIOCtrl); + bit_rw!(gpio_out_set, 0); + } + back_to_enum! { + pub enum GPIOCtrl { + Disabled: 0b0000, + Input: 0b0001, + GPIn: 0b0010, + GPOut: 0b0011, + ClkOut: 0b0100, + Int1: 0b0101, + Int2: 0b0110, + ADCWClk: 0b0111, + SecdBClk: 0b1000, + SecdWClk: 0b1001, + DigMic: 0b1010, + } + } register_rw!(DOUTCTL, 0, 53); + //TODO register_rw!(DINCTL, 0, 54); + //TODO register_rw!(MISOCTL, 0, 55); + //TODO register_rw!(SCLKCTL, 0, 56); + //TODO register_rw!(DACSPB, 0, 60); + //TODO register_rw!(ADCSPB, 0, 61); + //TODO register_rw!(DACSETUP, 0, 63); impl DACSETUP { - bitmask_rw!(dac_channel, 0b0011_1100, 2); - bit_rw!(ldac2r_enable, 5); - bit_rw!(ldac2l_enable, 4); - bit_rw!(rdac2l_enable, 3); - bit_rw!(rdac2r_enable, 2); + bit_rw!(left_dac_enable, 7); + bit_rw!(right_dac_enable, 6); + bitmask_rw!(left_dac_channel, 0b0011_0000, 4); //TODO: make enum + bitmask_rw!(right_dac_channel, 0b0000_1100, 2); //TODO: make enum + bitmask_rw!(dac_ch_volume_softstep, 0b0000_0011, 0); } - register_rw!(DACMUTE, 0, 64); - impl DACMUTE { - bitmask_rw!(mute, 0b0000_1100, 2); + register_rw!(DACSETUP2, 0, 64); + impl DACSETUP2 { + bit_rw!(diff_mono_modulator, 7); + bitmask_rw!(auto_mute, 0b0111_0000, 2); //TODO: make enum + bit_rw!(left_mute, 3); + bit_rw!(right_mute, 2); + bitmask_rw!(master_volume_ctrl, 0b0000_0011, 0); //TODO: make enum } register_rw!(LDACVOL, 0, 65); register_rw!(RDACVOL, 0, 66); + //TODO: register_rw!(HSDETECT, 0, 67); + //TODO: register_rw!(DRC_CTRL1, 0, 68); + //TODO: register_rw!(DRC_CTRL2, 0, 69); + //TODO: register_rw!(DRC_CTRL3, 0, 70); + //TODO: register_rw!(BEEBGEN1, 0, 71); + //TODO: register_rw!(BEEBGEN2, 0, 72); + //TODO: register_rw!(BEEBGEN3, 0, 73); + //TODO: register_rw!(BEEBGEN4, 0, 74); + //TODO: register_rw!(BEEBGEN5, 0, 75); + //TODO: register_rw!(BEEBGEN6, 0, 76); + //TODO: register_rw!(BEEBGEN7, 0, 77); + //TODO: register_rw!(BEEBGEN8, 0, 78); + //TODO: register_rw!(BEEBGEN9, 0, 79); register_rw!(ADCSETUP, 0, 81); impl ADCSETUP { - bitmask_rw!(dac_channel, 0b0110_0000, 6); - bit_rw!(ladc_enable, 7); - bit_rw!(radc_enable, 6); + bit_rw!(left_adc_enable, 7); + bit_rw!(right_adc_enable, 6); + bitmask_rw!(dig_mic_in_conf, 0b0011_0000, 4); + bit_rw!(left_dig_mic_enable, 3); + bit_rw!(right_dig_mic_enable, 2); + bitmask_rw!(volume_softstep, 0b0000_0011, 0); } - register_rw!(ADCFGA, 0, 82); - register_rw!(LADCVOL, 0, 83); - register_rw!(RADCVOL, 0, 84); - register_rw!(LAGC1, 0, 86); - register_rw!(LAGC2, 0, 87); - register_rw!(LAGC3, 0, 88); - register_rw!(LAGC4, 0, 89); - register_rw!(LAGC5, 0, 90); - register_rw!(LAGC6, 0, 91); - register_rw!(LAGC7, 0, 92); - register_rw!(RAGC1, 0, 94); - register_rw!(RAGC2, 0, 95); - register_rw!(RAGC3, 0, 96); - register_rw!(RAGC4, 0, 97); - register_rw!(RAGC5, 0, 98); - register_rw!(RAGC6, 0, 99); - register_rw!(RAGC7, 0, 100); + register_rw!(ADCFGA, 0, 82); //TODO + register_rw!(LADCVOL, 0, 83); //TODO + register_rw!(RADCVOL, 0, 84); //TODO + register_rw!(LAGC1, 0, 86); //TODO + register_rw!(LAGC2, 0, 87); //TODO + register_rw!(LAGC3, 0, 88); //TODO + register_rw!(LAGC4, 0, 89); //TODO + register_rw!(LAGC5, 0, 90); //TODO + register_rw!(LAGC6, 0, 91); //TODO + register_rw!(LAGC7, 0, 92); //TODO + register_rw!(RAGC1, 0, 94); //TODO + register_rw!(RAGC2, 0, 95); //TODO + register_rw!(RAGC3, 0, 96); //TODO + register_rw!(RAGC4, 0, 97); //TODO + register_rw!(RAGC5, 0, 98); //TODO + register_rw!(RAGC6, 0, 99); //TODO + register_rw!(RAGC7, 0, 100); //TODO register_rw!(PWRCFG, 1, 1); impl PWRCFG { bit_rw!(avdd_weak_disable, 3); } register_rw!(LDOCTL, 1, 2); impl LDOCTL { + //TODO: add the other parameters bit_rw!(enable, 0); } register_rw!(LPLAYBACK, 1, 3);