35 Commits

Author SHA1 Message Date
elagil
eba8089601 chore: fix build 2025-01-03 18:18:00 +01:00
elagil
d9ef2c94d7 chore: clean up stm32h5 ucpd 2025-01-03 17:54:59 +01:00
elagil
c08411f32f fix: docstrings 2024-12-22 15:07:58 +01:00
elagil
c9cd46bdf5 fix: h5-only rx filter 2024-12-22 15:07:58 +01:00
elagil
b35b45e151 feat: stm32h5 UCPD example 2024-12-22 15:07:58 +01:00
Sjoerd Simons
1b0661ebb1 [UCPD] Add support for non-SOP packets
Allow capturing (and distinguishing) non-SOP packets as well. The
default configuration will just configure SOP packets. For ease of use
the default receive function signature is unchanged as for PD sinks
(which is likely the common usage) just SOP is enough so no need to
differentiate.
2024-08-18 21:19:16 +02:00
Sjoerd Simons
9e8035cfb9 [USPD] clear interrupt flags right after reception
Clearing the interrupt flags at beginning of reception will masks
overruns and cause corrupted packets to be received. Instead clear the
flags right after disabling the interrupt/after reception, so overruns
on the next receive can be caught.

Tested by forcing overruns due to explicit sleeps

Signed-off-by: Sjoerd Simons <sjoerd@collabora.com>
2024-06-16 11:00:56 +02:00
Sjoerd Simons
84cbf1d198 [UCPD] Don't disable ucpd rx after each reception
When disabling the UCPD RX after every reception it's relatively easy to
drop packets. This seems to happen in particular with GoodCRC packets
which can be sent very quickly by a receiver. To avoid this enable
reception as soon as the pd phy get split out (preparing for packet
processing) and only disable again when the pd phy gets dropped.
2024-06-16 10:59:21 +02:00
Jan Špaček
081afca3f0 stm32/rcc: replace generated enable/disable code with runtime info 2024-05-25 18:44:55 +02:00
Timo Kröger
5c93e9dadd [UCPD] Use ChannelAndRequest helper 2024-05-10 10:37:56 +02:00
Dario Nieuwenhuis
b13ad7e80b Fix PeripheralRef soundness issue allowing &T.
Fix soundness issue introduced in a previous soundness fix https://github.com/embassy-rs/embassy/pull/2602 .
PeripheralRef must not implement DerefMut itself, but the blanket impl must still require DerefMut. Otherwise
you can create two instances of a driver on the same uart by using `&my_uart`.
2024-05-07 23:26:15 +02:00
Dario Nieuwenhuis
fb67fe0a6c stm32: add support for STM32H7[RS] "bootflash line", add HIL tests. 2024-05-01 02:24:45 +02:00
Dario Nieuwenhuis
2bca875b5f stm32: use private_bounds for sealed traits. 2024-03-23 01:38:51 +01:00
Timo Kröger
21e2499f35 [UCPD] Fix dead-battery disable for G0
Inverted flag got missed in the original PR.
2024-03-15 17:44:27 +01:00
Timo Kröger
57ca072dc3 [UCPD] Enable RX PHY only when receiving 2024-03-14 22:05:22 +01:00
Timo Kröger
62b0410e86 [UCPD] Set CC pins to analog mode
Example: On STM32G431 CC2 has a pull-up (default JTAG signal) which needs to be disabled.
2024-03-14 21:55:05 +01:00
Timo Kröger
88d1d38be7 [UCPD] RXORDSETEN can only be modified when disabled 2024-03-14 21:55:05 +01:00
Timo Kröger
b634f8f511 [UCPD] Fix hard reset interrupt disable flags 2024-03-14 21:55:05 +01:00
Timo Kröger
6e5bb8003a [UCPD] Adjust TX clock divider 2024-03-14 21:55:05 +01:00
Timo Kröger
e95e95ac7a [UCPD] Take interrupt in constructor and enable it 2024-03-14 21:55:05 +01:00
Timo Kröger
30cdc6c9c5 [UCPD] Disable dead-battery resistor for all families
Using the code from PR #2683, thank you @ExplodingWaffle
Removes the dead-battery as selectable option because its unclear if
it can be re-enabled. Also there is no use case for it because the same
resistor can be configured with the sink option.
2024-03-12 08:49:27 +01:00
Timo Kröger
eeb033caf0 [UCPD] Disable RCC clock on drop 2024-03-12 08:14:42 +01:00
Timo Kröger
89504f5162 [UCPD] Split into CC and PD phy
PD3.0 spec requires concurrent control of CC resistors for collision avoidance.
Needed to introduce some "ref counting" (its just a bool) for drop code.
2024-03-12 08:14:42 +01:00
Timo Kröger
99854ff840 [UCPD] Fix build for devices with GPDMA
Do not use a flag that is DMA/BDMA only, not required anyway
the transfer should run in the background nevertheless
2024-03-12 08:14:42 +01:00
Timo Kröger
ff8129a6a6 [UCPD] Implement hard reset transmission 2024-03-12 08:14:42 +01:00
Timo Kröger
c1efcbba2d [UCPD] Receive hard resets 2024-03-12 08:14:42 +01:00
Timo Kröger
b7972048a1 [UCPD] Improve example and defmt Format for enums 2024-03-12 08:14:42 +01:00
Timo Kröger
5e271ff31b [UCPD] Combine RX and TX
`select(rx.receive(), tx.transmit()` had subtle interrupt enable race conditions.
Combine receiver and transmitter into one new `PdPhy` struct to disallow the
problematic pattern.
Scanning through the USB PD 2.0 specification there is no need to have RX and TX
running concurrently (after all the USB PD communication is half-duplex).
2024-03-12 08:14:42 +01:00
Timo Kröger
36a9918921 [UCPD] Implement PD transmitter 2024-03-12 08:14:42 +01:00
Timo Kröger
984d5bbc72 [UCPD] Implement PD receiver 2024-03-12 08:14:42 +01:00
Timo Kröger
4d0e383816 [UCPD] Prepare for PD communication implementation 2024-03-12 08:14:42 +01:00
Timo Kröger
a3b1222617 [UCPD] Improve Type-C CC handling
* Improved interrupt handling: Clear flags in ISR, check state change in future
* Disable pull-up/pull-down resistors and voltage monitor on drop
* nightly rustfmt
2024-03-12 08:14:42 +01:00
Timo Kröger
d99fcfd0c2 [UCPD] Configuration Channel (CC) handling 2024-03-12 08:14:42 +01:00
Timo Kröger
aa1411e2c7 [UCPD] Prepare interrupt handle 2024-03-12 08:14:41 +01:00
Timo Kröger
8a255b375b [UCPD] Instance and Pin Traits
Skip FRSTX pin for now. Its available twice in the device JSON as
FRSTX1 and FRSTX2 both with the same pins as targets.
I don’t know enough about the FRS (fast role switch) feature to
understand if that is correct and how to handle the pins.
2024-03-12 08:14:41 +01:00