2848 Commits

Author SHA1 Message Date
michel
31da5155e8 Refactor TSC module: Remove redundant 'Tsc' prefixes for improved naming consistency 2024-11-29 17:58:35 +01:00
michel
721c6820d4 STM32-TSC: enable discriminating between pins within same TSC group and improve TSC library in general 2024-11-29 17:58:33 +01:00
elagil
5d2b38c979 doc: improve comment 2024-11-28 17:45:00 +01:00
elagil
152d8ee0d9 fix: make write_immediate() for ring buffers right-aligned 2024-11-28 17:39:39 +01:00
Dario Nieuwenhuis
8954c053fb
Merge pull request #3583 from williams-one/add-flash-bank-selection-for-erase
STM32U5: Add flash bank selection when erasing a sector
2024-11-28 14:15:30 +00:00
eZio Pan
f3e674a79c stm32: remove redundant time-driver macro 2024-11-28 15:48:27 +08:00
William
b035ff1145 stm32u5: Add flash bank selection when erasing a sector 2024-11-27 17:29:08 +01:00
Dario Nieuwenhuis
0d5cd7d692
Merge pull request #3582 from itswenb/main
fix: Add missing clock check
2024-11-27 09:50:34 +00:00
Bing Wen
09c9f64b8e Add missing clock check 2024-11-27 17:44:03 +08:00
Ulf Lilleengen
8e25bc56f6
Merge pull request #3574 from itswenb/main
feat: Add new feature to enable overclocking
2024-11-27 07:38:00 +00:00
Bing Wen
b225d73dc5 Change compile condition 2024-11-27 14:00:45 +08:00
Bing Wen
d0340ad297 Fix & Revert 2024-11-27 12:33:32 +08:00
Bing Wen
52ab015fac Add new 2024-11-27 12:23:13 +08:00
Bing Wen
8eaa3c8fd3 Add new feature to enable overclocking 2024-11-26 12:46:20 +08:00
Dario Nieuwenhuis
37111a891c
Merge pull request #3556 from chrenderle/low-power
low-power: add support for stm32u0
2024-11-25 14:00:28 +00:00
Dario Nieuwenhuis
aaad8450e9
Use inline const for initializing arrays. (#3567) 2024-11-24 20:58:48 +01:00
Dario Nieuwenhuis
032af9d512 otg: fix corruption in CONTROL OUT transfers in stm32f4.
The RM says we have to process STUP (and therefore clear CNAK to start the data stage)
in the DOEPINT STUP interrupt. Seems doing it in RXFLVL when we receive the data is
too early. This makes it work consistently on all chips, so the quirk is no longer needed.

Fixes #3493
Fixes #3459
2024-11-24 00:32:26 +01:00
Dario Nieuwenhuis
4f459bb918 otg: improve trace logging, print bytes as hex. 2024-11-24 00:32:26 +01:00
Ivan Li
54b39ba492
stm32 adc g4 async read
Signed-off-by: Ivan Li <ivanli2048@gmail.com>
2024-11-23 12:52:22 +08:00
Christian Enderle
1fbb419f72 low-power: add support for stop for stm32u0 2024-11-22 10:37:12 +01:00
Christian Enderle
a49289ce7b low-power: add basic support for stm32u0 2024-11-22 10:37:12 +01:00
Christian Enderle
29934237a5 rtc: reorganize low-power SealedInstance 2024-11-22 10:37:12 +01:00
Christian Enderle
48fd80919a rcc: enable lse for stm32u0 2024-11-22 10:37:12 +01:00
Gabriel Smith
bd65906d14
STM32H5xx ADC (#3557)
* stm32: Update STM32 data source

* stm32h5: Add ADC example
2024-11-21 23:23:46 +01:00
Christian Enderle
f598cae376 compute lse and lsi frequency for STM32L and STM32U0 series 2024-11-21 12:12:00 +01:00
Dario Nieuwenhuis
66756af2f0
Merge pull request #3547 from bugadani/callback
Executor: Only set callback once
2024-11-20 23:14:02 +00:00
Aurélien Jacobs
3402e76f98 stm32/timer: avoid max_compare_value >= u16::MAX
With STM32 32 bits timers, the max_compare_value (AKA, ARR register)
can currently be set greater than u16::MAX, which leads to the following
assert!(max < u16::MAX as u32) in max_duty_cycle() when setting up a 1 kHz
SimplePwm on 84 MHz MCU.

The issue is fixed by forcing a max_compare_value that fits into 16 bits
when setting the frequency for a PWM.
2024-11-20 16:21:20 +01:00
Dániel Buga
8ebe059ecb
Add initialize 2024-11-19 16:25:17 +01:00
elagil
de7fae1822 fix: enable backup symbol clock 2024-11-18 20:51:23 +01:00
elagil
62dbdcd45a feat: add SPDIFRX driver 2024-11-18 20:51:22 +01:00
Christian Enderle
e76473ae95 fixed hanging when lse_sysen disabled 2024-11-18 12:23:56 +01:00
Christian Enderle
e09e4e9612 Enable user to choose to pass lse clock to peripherals 2024-11-18 12:23:56 +01:00
elagil
ee9ca44703 refactor: naming of wait functions 2024-11-17 23:56:45 +01:00
elagil
7ae2816341 feat: SAI/ringbuffer add function to wait for any write error 2024-11-17 23:10:11 +01:00
elagil
d592875ca6 fix(SAI): disallow start without initial write 2024-11-16 15:02:32 +01:00
elagil
edb9b03dee fix: flush SAI FIFO on init 2024-11-15 00:07:23 +01:00
elagil
4692f06c33 fix: flush SAI FIFO on disable 2024-11-15 00:01:40 +01:00
Junfeng Liu
4d75c4ee51 Fix wrong unit 2024-11-12 10:36:44 +08:00
Dario Nieuwenhuis
0de204ccd7 Fix "non-local impl definition" warning from recent nightlies. 2024-11-08 13:20:13 +01:00
Christian Enderle
cf2424f5c2 RCC: add lsi and lse clock frequency for STM32U5 2024-11-07 14:16:10 +01:00
Christian Enderle
7231032f97 RCC: added msik for stm32u5 2024-11-07 13:32:07 +01:00
elagil
e69be0a23b fix: STM32U5 RCC fields 2024-11-06 19:46:55 +01:00
Kenneth Knudsen
72109a7bda Split_ref with shortened lifetime. When borrowed skip drop on rx and tx 2024-11-06 10:52:03 +01:00
Kenneth Knudsen
aa453caa79 add split_ref for stm32 uart 2024-11-04 15:08:57 +01:00
Dario Nieuwenhuis
089b8a482e
Merge pull request #3451 from dvdsk/read_ready
stm32/uart impl ReadReady for RingbufferdUart
2024-11-03 23:57:07 +00:00
Christian Enderle
926ae1a1d5 low-power: add support for stm32u5 2024-11-03 10:56:40 +01:00
dvdsk
43ff5a9b28
stm32/uart fix leftover DmaUnsynced public api 2024-11-02 14:00:27 +01:00
Krzysztof Królczyk
e93ac532ac
feat/stm32: disable multicast filtering on eth v2
Initially, this was feature-gated, but has been requested
to be changed to be unconditional, see PR 3488 for reasons.

When filtering is enabled, it intercepts and drops silently
ipv6 packets, possibly somewhere around
smoltcp::iface::interface::ipv6 lines 36, 44 in current head
sha e9b66eadaeacef758ebc4a12378f8d2162144cf4

With filtering disabled (this patch), packets are received
and communication over ipv6 is possible, neighbor discovery works.

related: #2496

Signed-off-by: Krzysztof Królczyk <Krzysztof.Krolczyk@o2.pl>
2024-11-01 19:02:10 +01:00
Dario Nieuwenhuis
04bd2bac76
Merge pull request #3475 from diondokter/qspi-async
STM32 Qspi async
2024-10-30 09:57:09 +00:00
Dion Dokter
a3bbb3b43a Add check for the flipside of the coin too 2024-10-29 23:35:28 +01:00