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188 Commits

Author SHA1 Message Date
Dario Nieuwenhuis
d41eeeae79 Remove Peripheral trait, rename PeripheralRef->Peri. 2025-03-27 15:18:06 +01:00
Dario Nieuwenhuis
a592acb806 stm32/cryp: remove DMA generic param. 2025-03-25 22:18:21 +01:00
Dario Nieuwenhuis
db86aba841 stm32/hash: remove DMA generic param. 2025-03-25 21:57:37 +01:00
noracarmig
72020fc012 Reset complete count global variable on Dma configure 2025-01-26 14:53:10 +00:00
Dario Nieuwenhuis
eda51673f5
Merge pull request #3704 from CNLHC/pwm_support_gp32 
feat: Add 32-bit timer support for waveform function
 2025-01-21 22:57:47 +00:00
Liu Hancheng
4ad3b66e45 refactor: update write DMA transfer function to use separate memory word type 2025-01-05 10:25:10 +08:00
Liu Hancheng
50e98a9a58 refactor: update DMA transfer functions to support separate memory and peripheral word types 2025-01-04 22:10:47 +08:00
Liu Hancheng
ff526e1604 refactor: update DMA transfer functions to use separate memory and peripheral sizes 2025-01-04 20:16:34 +08:00
elagil
eba8089601 chore: fix build 2025-01-03 18:18:00 +01:00
elagil
5d2b38c979 doc: improve comment 2024-11-28 17:45:00 +01:00
elagil
152d8ee0d9 fix: make write_immediate() for ring buffers right-aligned 2024-11-28 17:39:39 +01:00
elagil
ee9ca44703 refactor: naming of wait functions 2024-11-17 23:56:45 +01:00
elagil
7ae2816341 feat: SAI/ringbuffer add function to wait for any write error 2024-11-17 23:10:11 +01:00
elagil
d592875ca6 fix(SAI): disallow start without initial write 2024-11-16 15:02:32 +01:00
dvdsk
edac7cc630
stm32/uart remove DmaUnsynced from public api 
Its an internal error which should never be exposed. It should only
occur with wrong driver implementations. We log to the user and return
an Overrun error since handling DmaUnsynced as an Overrun will resolve it.
 2024-10-26 12:38:10 +02:00
Alexandros Liarokapis
28d03537e9 stm32: Automatically clear on WritableRingBuffer start 2024-10-15 12:29:12 +03:00
Alexandros Liarokapis
d280b23428 fix adc/ringbuffered_v2.rs 2024-10-15 12:29:12 +03:00
Alexandros Liarokapis
2ec05da5dd simplify if/else handling on ringbuffer 2024-10-15 12:29:12 +03:00
Alexandros Liarokapis
f0d2ebdc7e stm32: fix ringbugger overrun errors due to bad dma wrap-around behavior 2024-10-15 12:29:12 +03:00
Alexandros Liarokapis
9c7b296432 overrun at invalid diffs, rename clear to reset, simplify dma_sync method 2024-10-15 12:29:12 +03:00
Alexandros Liarokapis
8271225216 make len method take mut self and remove sync index calls 2024-10-15 12:29:12 +03:00
Alexandros Liarokapis
85fb890b00 add auto-clear functionality to ringbuffer 2024-10-15 12:29:12 +03:00
Alexandros Liarokapis
f4ec0cb4d4 simplify and rename ringbuffer methods, make len available 2024-10-15 12:29:12 +03:00
Alexandros Liarokapis
2b10caafd4 stm32: initial support for alternative ringbuffer implementation 2024-10-15 12:29:12 +03:00
Dario Nieuwenhuis
59dcffbc60 stm32/gpdma: clear tr3 just in case. 2024-09-23 02:06:58 +02:00
Dario Nieuwenhuis
f2f96a731c stm32/gpdma: ensure bndt in bytes doesn't overflow. 2024-09-23 02:06:58 +02:00
Peter Krull
2a9cdaabaa stm32: Moved comment to match request_stop 2024-09-19 18:25:08 +02:00
Peter Krull
907d55ea82 stm32: Added request_pause to DMA, and use it for RingBufferedUartRx 2024-09-19 18:14:09 +02:00
Badr Bouslikhin
0e477a4df5
fix(stm32): enable dma half transfer interrupt for buffereduart 2024-09-06 18:55:33 +02:00
Alexandros Liarokapis
2b7e76efe9 Fix dma nvic issues on dual core lines 
This commit addresses #3256 by disabling dma NVIC interrupt enablement at startup.
Instead, per-channel NVIC interrupt enablement is now done with the rest of the dma channel configuration.
This ensures that each core will only handle the interrupts of the DMA channels that it uses.
 2024-08-17 16:54:41 +03:00
Alexandros Liarokapis
00ff1409cd Enables half transfer ir when constructing a ReadableDmaRingBuffer 
The half transfer irq needs to be enabled in order for the hardware to
notify the waker when the transfer is at half. This is needed to ensure
no overuns occur when using `ReadableDmaRingBuffer`'s `read_exact`.
Otherwise we are only notified when the DMA has completed its cycle and
is on its way to start overwriting the data. The docs in the dma_bdma
buf module also seem to imply that the half transfer irq must be enabled for
proper operation. The only consumers of the `ReadableDmaRingBuffer` api
are the sai module and the `RingBufferedUartRx`. The former enables the
irq manually when constructing the transfer options while the
latter does not. This may also be the cause for #1441.
 2024-06-23 11:43:50 +03:00
Dario Nieuwenhuis
7ad76f5f60 Use raw slices .len() method instead of unsafe hacks. 
Stabilized in 1.79.
 2024-06-13 20:41:08 +02:00
Alexandros Liarokapis
f9324201b1 add proper rxonly support for spi_v3 and force tx dma stream requirement on others 2024-05-27 17:49:47 +03:00
Dario Nieuwenhuis
1ed2a0504a stm32/dma: add support for same channel with different req in different DMAs/DMAMUXes. 2024-04-29 23:56:15 +02:00
Dario Nieuwenhuis
6f44d7a9df stm32: update metapac. Adds U5 LPDMA, fixes ADC_COMMONs. 2024-04-29 20:52:27 +02:00
Dario Nieuwenhuis
02da66aec8 stm32/dma: add ChannelAndRequest helper. 2024-04-15 21:52:40 +02:00
Tyler Gilbert
cb01d03835 Add async stop() function to stm32 bdma_dma 2024-03-31 16:31:47 -05:00
Dario Nieuwenhuis
2bca875b5f stm32: use private_bounds for sealed traits. 2024-03-23 01:38:51 +01:00
Dario Nieuwenhuis
eca9aac194 Fix warnings in recent nightly. 2024-03-20 16:39:09 +01:00
Caleb Garrett
50a7ada0bb Fixed DMA CI build issues. 2024-03-10 17:28:53 -04:00
Caleb Garrett
e92094986d Add DMA request priority as transfer option. 2024-03-10 16:53:37 -04:00
Timo Kröger
bbc06458a3 stm32: Implement Channel trait for AnyChannel 2024-03-07 15:05:28 +01:00
Dario Nieuwenhuis
e67dfcb04f stm32/dma: add AnyChannel, add support for BDMA on H7. 2024-02-24 02:41:41 +01:00
Dario Nieuwenhuis
e8474426d8 hal-internal: remove impl DerefMut for PeripheralRef. 
if you have `PeripheralRef<'a, AnyPIn>` for pin A, and `AnyPin` (owned) for pin B, you can `mem::swap` them.
so, getting access forever to pin A, just by "sacrificing" pin B

this defeats the point of PeripheralRef, which is if you got a `PeripheralRef<'a, T>` then you're only allowed to use the peripheral for `'a`.

Also some drivers rely on the fact only one instance of a singleton exists for soundness, so this is a soundness fix for those.
 2024-02-20 01:02:15 +01:00
eZio Pan
d6636ca116 minor fix 2024-02-09 23:57:09 +01:00
Tyler Gilbert
994b77e684 Add write_immediate() function to STM32 DMA ringbuffer API to pre-fill the buffer before starting the DMA 2024-01-03 11:06:03 -06:00
eZio Pan
745d618ab7 note on circular mode DMA 2023-12-21 17:03:10 +08:00
Dario Nieuwenhuis
c8c8b89104 stm32: doc everything else. 2023-12-19 18:03:20 +01:00
eZio Pan
254d587385 match up with metapac change 2023-12-19 17:12:34 +08:00
Dario Nieuwenhuis
124478c5e9 stm32: more docs. 2023-12-18 19:11:23 +01:00