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remove dead code when v1

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jrmoulton 2024-06-18 11:17:15 -06:00
parent bec0eac5ab
commit 8b50f2a58b
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2 changed files with 9 additions and 6 deletions
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6
embassy-stm32/src/i2c/config.rs
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@ -46,12 +46,6 @@ impl From<u16> for Address {
} }
} }
impl Address { impl Address {
pub(super) fn add_mode(&self) -> stm32_metapac::i2c::vals::Addmode {
match self {
Address::SevenBit(_) => stm32_metapac::i2c::vals::Addmode::BIT7,
Address::TenBit(_) => stm32_metapac::i2c::vals::Addmode::BIT10,
}
}
/// Get the inner address as a u16. /// Get the inner address as a u16.
/// ///
/// For 7 bit addresses, the u8 that was used to store the address is returned as a u16. /// For 7 bit addresses, the u8 that was used to store the address is returned as a u16.

9
embassy-stm32/src/i2c/v2.rs
View File

@ -27,6 +27,15 @@ impl From<AddrMask> for Oamsk {
} }
} }
impl Address {
pub(super) fn add_mode(&self) -> stm32_metapac::i2c::vals::Addmode {
match self {
Address::SevenBit(_) => stm32_metapac::i2c::vals::Addmode::BIT7,
Address::TenBit(_) => stm32_metapac::i2c::vals::Addmode::BIT10,
}
}
}
pub(crate) unsafe fn on_interrupt<T: Instance>() { pub(crate) unsafe fn on_interrupt<T: Instance>() {
let regs = T::info().regs; let regs = T::info().regs;
let isr = regs.isr().read(); let isr = regs.isr().read();