HR/PEE20_motionController
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compare: HR:699cd62939cbcaeb41859968459740b67da0e189
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11 Commits
ae3cb731c6 ... 699cd62939

Author SHA1 Message Date
Mats van Reenen
699cd62939 reverse motor and bug fixes 2020-05-28 15:56:06 +02:00
Mats van Reenen
db801bdc25 update old code 2020-05-28 15:08:31 +02:00
Mats van Reenen
b8dd1398c2 fix invalic octal numbers 2020-05-28 15:08:12 +02:00
Mats van Reenen
ed96788e88 I hate this kind of bugs :( 2020-05-27 11:47:04 +02:00
Mats van Reenen
1e2b9ce3ad fix refrences 2020-05-27 11:03:43 +02:00
Mats van Reenen
13ca2f3f9c add /.launches 2020-05-27 09:17:14 +02:00
Mats van Reenen
fe237f8f09 add MDStatus() and some cleanup 2020-05-27 09:14:29 +02:00
Mats van Reenen
7e38aa9a64 add bool and bits 2020-05-27 09:06:50 +02:00
Mats van Reenen
b35237eec1 fix SPI modes 2020-05-25 12:15:47 +02:00
Mats van Reenen
fee6db6e7d Merge branch 'master' of https://bitbucket.org/MReenenHR/motion-controller 2020-05-25 10:59:48 +02:00
Mats van Reenen
83c27b43dd cleanup 2020-05-25 10:54:38 +02:00
9 changed files with 96 additions and 44 deletions
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1
.gitignore vendored
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@ -11,4 +11,5 @@
/.cproject /.cproject
/.ccsproject /.ccsproject
/.project /.project
/.launches
/lnk_*.cmd /lnk_*.cmd

1
Mfrc522.c
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@ -8,6 +8,7 @@
Lightly modified by Mats van Reenen: use other SPI interface Lightly modified by Mats van Reenen: use other SPI interface
*/ */
#include <msp430.h>
#include <Mfrc522.h> #include <Mfrc522.h>
#include <SPI.h> #include <SPI.h>
//#include <SPI2.h> //#include <SPI2.h>

1
NFC.c
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@ -1,5 +1,4 @@
#include <msp430.h> #include <msp430.h>
#include "NFC.h" #include "NFC.h"
#include "SPI2.h"
#include "Mfrc522.h" #include "Mfrc522.h"

2
SPI.c
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@ -78,7 +78,7 @@ void SPISend(){
while(UCB0STAT & UCBUSY); // wait for SPI TX/RX to finish while(UCB0STAT & UCBUSY); // wait for SPI TX/RX to finish
// save recieved data // save recieved data
SPI_packet[SPI_packetC] = UCA0RXIFG; SPI_packet[SPI_packetC] = UCA0RXBUF;
// increase counter for next byte // increase counter for next byte
SPI_packetC++; SPI_packetC++;

2
SPI.h
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@ -10,7 +10,7 @@
#include "typedefExtention.h" #include "typedefExtention.h"
enum SPI_Mode {SPI_Mode0=0b00<<6, SPI_Mode1=0b10<<6, SPI_Mode2=0b11<<6, SPI_Mode3=0b01<<6}; enum SPI_Mode {SPI_Mode0=0b10<<6, SPI_Mode1=0b00<<6, SPI_Mode2=0b11<<6, SPI_Mode3=0b01<<6};
enum SPI_Clock {SPI_Clock_1MHz=16, SPI_Clock_2MHz=8, SPI_Clock_4MHz=4, SPI_Clock_8MHz=2}; enum SPI_Clock {SPI_Clock_1MHz=16, SPI_Clock_2MHz=8, SPI_Clock_4MHz=4, SPI_Clock_8MHz=2};
uchar SPI_packet[5]; uchar SPI_packet[5];

4
main.c
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@ -41,8 +41,6 @@
*/ */
int main(void) int main(void)
{ {
int v;
WDTCTL = WDTPW | WDTHOLD; // stop watchdog timer WDTCTL = WDTPW | WDTHOLD; // stop watchdog timer
// set cpu op 16MHz // set cpu op 16MHz
@ -52,7 +50,7 @@ int main(void)
SPIInit(); SPIInit();
MDInit(); MDInit();
MCInit(); MCInit();
NFCInit(); //NFCInit();
return 0; return 0;
} }

92
motorDriver.c
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@ -6,40 +6,52 @@
*/ */
#include <msp430.h> #include <msp430.h>
#include "typedefExtention.h"
#include "SPI.h" #include "SPI.h"
#include "motorDriver.h" #include "motorDriver.h"
const uchar MD_CS = BIT3; const uchar MD_CS = BIT3;
// register 0x00 GCINF // register 0x00 GCINF
#define MD_GCONF 0X00 #define MD_GCONF 0x00
#define MD_GCONF_singgelMotor 0x00000001 #define MD_GCONF_singgelMotor BIT00
#define MD_GCONF_stepdir1Enable 0x00000002 #define MD_GCONF_stepdir1Enable BIT01
#define MD_GCONF_stepdir2Enable 0x00000004 #define MD_GCONF_stepdir2Enable BIT02
#define MD_GCONF_motor1Revers 0x00000010 #define MD_GCONF_motor1Revers BIT08
#define MD_GCONF_motor1Revers 0x00000010 #define MD_GCONF_motor2Revers BIT09
#define MD_GCONF_lockGCONF 0x00000020 #define MD_GCONF_lockGCONF BIT10
// register 0x01 GSTAT // register 0x01 GSTAT
#define MD_GSTAT 0X01 #define MD_GSTAT 0x01
#define MD_GSTAT_recet BIT00
#define MD_GSTAT_drv_err1 BIT01
#define MD_GSTAT_drv_err2 BIT02
#define MD_GSTAT_un_cp BIT03
// register 0x30, 0x50 IHOLD_IRUN // register 0x30, 0x50 IHOLD_IRUN
#define MD_IHIR1 0x30 #define MD_IHIR1 0x30
#define MD_IHIR2 0x50 #define MD_IHIR2 0x50
#define MD_IHIR_iHold 0 #define MD_IHIR_iHold 0 // 5 bitts ( (x+1)/32 A )
#define MD_IHIR_iRun 8 #define MD_IHIR_iRun 8 // 5 bits
#define md_IHIR_iHoldDelay 16ul #define md_IHIR_iHoldDelay 16 // 4
// register 0x6C, 7C CHOPCONF // register 0x6C, 7C CHOPCONF
#define MD_CC1 0X6C #define MD_CC1 0x6C
#define MD_CC2 0X7C #define MD_CC2 0x7C
#define MD_CC_shortProtection 0x40000000 #define MD_CC_shortProtection 0x40000000
#define MD_CC_doubbleEdge 0x20000000 #define MD_CC_doubbleEdge 0x20000000
#define MD_CC_16ustapI 0x10000000 #define MD_CC_16ustapI 0x10000000
#define MD_CC_mres 24 // 4 bits; 1/(2^x / 2^8) microstappen #define MD_CC_mres 24 // 4 bits; 1/(2^x / 2^8) microstappen
#define MD_CC_vsens 0x00020000 #define MC_CC_FULLSTEP 8ul << MD_CC_mres
#define MD_CC_tbl 15 // 3 bits? #define MC_CC_2US 7ul << MD_CC_mres
#define MC_CC_4US 6ul << MD_CC_mres
#define MC_CC_8US 5ul << MD_CC_mres
#define MC_CC_16US 4ul << MD_CC_mres
#define MC_CC_32US 3ul << MD_CC_mres
#define MC_CC_64US 2ul << MD_CC_mres
#define MC_CC_128US 1ul << MD_CC_mres
#define MC_CC_256US 0ul << MD_CC_mres
#define MD_CC_vsens BIT17
#define MD_CC_tbl 15 // 2 bits
#define MD_CC_cmh BIT14 #define MD_CC_cmh BIT14
#define MD_CC_rndtf 0x00002000 #define MD_CC_rndtf 0x00002000
#define MD_CC_disfdcc 0x00001000 #define MD_CC_disfdcc 0x00001000
@ -48,21 +60,21 @@ const uchar MD_CS = BIT3;
#define MD_CC_hstrt 4 // 3 bits #define MD_CC_hstrt 4 // 3 bits
#define MD_CC_toff 0 // 4 bits #define MD_CC_toff 0 // 4 bits
// bool md_checkError(){ enum bool MDStatus(){
// unsigned long stat = md_read(MD_GSTAT); ulong stat = MD_read(MD_GSTAT);
// if(stat != 0){ if(stat != 0){
// if(stat == 0x1){ // only a recet has occert if(stat == 0x1){ // only a recet has occert
// // restart the motor driver // restart the motor driver
// md_setup(); MDInit();
// }else{ // one of the motorst stopt due to short or overheated or a undervoltage in chargepump }else{ // one of the motors stopt due to short or overheated or a undervoltage in chargepump
// // wait a while for checking again // wait a while for checking again
// delay(1000); __delay_cycles(16000000);
// md_checkError(); MDStatus();
// } }
// return true; return true;
// } }
// return false; return false;
// } }
void MD_write(uchar addr, ulong data) { void MD_write(uchar addr, ulong data) {
char i; char i;
@ -80,11 +92,11 @@ void MD_write(uchar addr, ulong data) {
data >>= 8; data >>= 8;
} }
SPISend(SPI_Mode3); SPISend();
} }
unsigned long MD_read(uchar addr) { ulong MD_read(uchar addr) {
char i; char i;
ulong data; ulong data;
@ -95,13 +107,13 @@ unsigned long MD_read(uchar addr) {
addr &= ~0x80; addr &= ~0x80;
SPI_packet[0] = addr; SPI_packet[0] = addr;
SPISend(SPI_Mode3); SPISend();
// wait for SPI bus to be available // wait for SPI bus to be available
SPIInitSend(MD_CS, SPI_Mode3, SPI_Clock_4MHz); SPIInitSend(MD_CS, SPI_Mode3, SPI_Clock_4MHz);
SPI_packet[0] = addr; SPI_packet[0] = addr;
SPISend(SPI_Mode3); SPISend();
// read data // read data
for(i=2; i<5; i++){ for(i=2; i<5; i++){
@ -116,9 +128,13 @@ void MDInit(){
P1DIR |= MD_CS; // set MD_CS (pin 3) as output P1DIR |= MD_CS; // set MD_CS (pin 3) as output
P1OUT |= MD_CS; // set MD_CS high P1OUT |= MD_CS; // set MD_CS high
MD_write(MD_GCONF, MD_GCONF_stepdir2Enable | MD_GCONF_stepdir1Enable); MDStatus();
MD_write(MD_CC1, 3ul<<MD_CC_toff | (4ul<<MD_CC_hstrt) | (1ul<<MD_CC_hend) | (2ul<<MD_CC_tbl) | (4ul<<MD_CC_mres) | MD_CC_16ustapI);
MD_write(MD_CC2, 3ul<<MD_CC_toff | (4ul<<MD_CC_hstrt) | (1ul<<MD_CC_hend) | (2ul<<MD_CC_tbl) | (4ul<<MD_CC_mres) | MD_CC_16ustapI); MD_write(MD_GCONF, MD_GCONF_stepdir2Enable | MD_GCONF_stepdir1Enable | MD_GCONF_motor2Revers);
MD_write(MD_CC1, 3ul<<MD_CC_toff | (4ul<<MD_CC_hstrt) | (1ul<<MD_CC_hend) | (2ul<<MD_CC_tbl) | MC_CC_16US | MD_CC_16ustapI);
MD_write(MD_CC2, 3ul<<MD_CC_toff | (4ul<<MD_CC_hstrt) | (1ul<<MD_CC_hend) | (2ul<<MD_CC_tbl) | MC_CC_16US | MD_CC_16ustapI);
MD_write(MD_IHIR1, 10ul<<MD_IHIR_iHold | 31ul<<MD_IHIR_iRun | 6ul<<md_IHIR_iHoldDelay); MD_write(MD_IHIR1, 10ul<<MD_IHIR_iHold | 31ul<<MD_IHIR_iRun | 6ul<<md_IHIR_iHoldDelay);
MD_write(MD_IHIR2, 10ul<<MD_IHIR_iHold | 31ul<<MD_IHIR_iRun | 6ul<<md_IHIR_iHoldDelay); MD_write(MD_IHIR2, 10ul<<MD_IHIR_iHold | 31ul<<MD_IHIR_iRun | 6ul<<md_IHIR_iHoldDelay);
MDStatus();
} }

3
motorDriver.h
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@ -8,6 +8,9 @@
#ifndef MOTORDRIVER_H_ #ifndef MOTORDRIVER_H_
#define MOTORDRIVER_H_ #define MOTORDRIVER_H_
#include "typedefExtention.h"
void MDInit(); void MDInit();
enum bool MDStatus();
#endif /* MOTORDRIVER_H_ */ #endif /* MOTORDRIVER_H_ */

34
typedefExtention.h
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@ -13,5 +13,39 @@ typedef unsigned char uchar;
typedef unsigned int uint; typedef unsigned int uint;
typedef unsigned long ulong; typedef unsigned long ulong;
typedef enum bool {false=0, true=1};
#define BIT00 1ul << 0
#define BIT01 1ul << 1
#define BIT02 1ul << 2
#define BIT03 1ul << 3
#define BIT04 1ul << 4
#define BIT05 1ul << 5
#define BIT06 1ul << 6
#define BIT07 1ul << 7
#define BIT08 1ul << 8
#define BIT09 1ul << 9
#define BIT10 1ul << 10
#define BIT11 1ul << 11
#define BIT12 1ul << 12
#define BIT13 1ul << 13
#define BIT14 1ul << 14
#define BIT15 1ul << 15
#define BIT16 1ul << 16
#define BIT17 1ul << 17
#define BIT18 1ul << 18
#define BIT19 1ul << 19
#define BIT20 1ul << 20
#define BIT21 1ul << 21
#define BIT22 1ul << 22
#define BIT23 1ul << 23
#define BIT24 1ul << 24
#define BIT25 1ul << 25
#define BIT26 1ul << 26
#define BIT27 1ul << 27
#define BIT28 1ul << 28
#define BIT29 1ul << 29
#define BIT30 1ul << 30
#define BIT31 1ul << 31
#endif /* TYPEDEFEXTENTION_H_ */ #endif /* TYPEDEFEXTENTION_H_ */