286 lines
8.9 KiB
C
286 lines
8.9 KiB
C
/**
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* Copyright (c) 2020 Raspberry Pi (Trading) Ltd.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <stdio.h>
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#include "pico/stdlib.h"
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#include "hardware/interp.h"
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void times_table() {
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puts("9 times table:");
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// Initialise lane 0 on interp0 on this core
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interp_config cfg = interp_default_config();
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interp_set_config(interp0, 0, &cfg);
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interp0->accum[0] = 0;
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interp0->base[0] = 9;
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for (int i = 0; i < 10; ++i)
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printf("%d\n", interp0->pop[0]);
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}
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void moving_mask() {
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interp_config cfg = interp_default_config();
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interp0->accum[0] = 0x1234abcd;
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puts("Masking:");
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printf("ACCUM0 = %08x\n", interp0->accum[0]);
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for (int i = 0; i < 8; ++i) {
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// LSB, then MSB. These are inclusive, so 0,31 means "the entire 32 bit register"
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interp_config_set_mask(&cfg, i * 4, i * 4 + 3);
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interp_set_config(interp0, 0, &cfg);
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// Reading from ACCUMx_ADD returns the raw lane shift and mask value, without BASEx added
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printf("Nibble %d: %08x\n", i, interp0->add_raw[0]);
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}
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puts("Masking with sign extension:");
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interp_config_set_signed(&cfg, true);
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for (int i = 0; i < 8; ++i) {
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interp_config_set_mask(&cfg, i * 4, i * 4 + 3);
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interp_set_config(interp0, 0, &cfg);
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printf("Nibble %d: %08x\n", i, interp0->add_raw[0]);
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}
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}
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void cross_lanes() {
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interp_config cfg = interp_default_config();
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interp_config_set_cross_result(&cfg, true);
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// ACCUM0 gets lane 1 result:
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interp_set_config(interp0, 0, &cfg);
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// ACCUM1 gets lane 0 result:
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interp_set_config(interp0, 1, &cfg);
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interp0->accum[0] = 123;
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interp0->accum[1] = 456;
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interp0->base[0] = 1;
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interp0->base[1] = 0;
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puts("Lane result crossover:");
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for (int i = 0; i < 10; ++i)
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printf("PEEK0, POP1: %d, %d\n", interp0->peek[0], interp0->pop[1]);
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}
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void simple_blend1() {
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puts("Simple blend 1:");
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interp_config cfg = interp_default_config();
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interp_config_set_blend(&cfg, true);
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interp_set_config(interp0, 0, &cfg);
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cfg = interp_default_config();
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interp_set_config(interp0, 1, &cfg);
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interp0->base[0] = 500;
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interp0->base[1] = 1000;
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for (int i = 0; i <= 6; i++) {
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// set fraction to value between 0 and 255
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interp0->accum[1] = 255 * i / 6;
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// ≈ 500 + (1000 - 500) * i / 6;
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printf("%d\n", (int) interp0->peek[1]);
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}
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}
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/// \tag::simple_blend2[]
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void print_simple_blend2_results(bool is_signed) {
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// lane 1 signed flag controls whether base 0/1 are treated as signed or unsigned
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interp_config cfg = interp_default_config();
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interp_config_set_signed(&cfg, is_signed);
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interp_set_config(interp0, 1, &cfg);
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for (int i = 0; i <= 6; i++) {
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interp0->accum[1] = 255 * i / 6;
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if (is_signed) {
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printf("%d\n", (int) interp0->peek[1]);
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} else {
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printf("0x%08x\n", (uint) interp0->peek[1]);
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}
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}
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}
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void simple_blend2() {
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puts("Simple blend 2:");
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interp_config cfg = interp_default_config();
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interp_config_set_blend(&cfg, true);
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interp_set_config(interp0, 0, &cfg);
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interp0->base[0] = -1000;
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interp0->base[1] = 1000;
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puts("signed:");
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print_simple_blend2_results(true);
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puts("unsigned:");
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print_simple_blend2_results(false);
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}
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/// \end::simple_blend2[]
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void simple_blend3() {
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puts("Simple blend 3:");
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interp_config cfg = interp_default_config();
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interp_config_set_blend(&cfg, true);
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interp_set_config(interp0, 0, &cfg);
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cfg = interp_default_config();
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interp_set_config(interp0, 1, &cfg);
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interp0->accum[1] = 128;
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interp0->base01 = 0x30005000;
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printf("0x%08x\n", (int) interp0->peek[1]);
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interp0->base01 = 0xe000f000;
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printf("0x%08x\n", (int) interp0->peek[1]);
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interp_config_set_signed(&cfg, true);
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interp_set_config(interp0, 1, &cfg);
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interp0->base01 = 0xe000f000;
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printf("0x%08x\n", (int) interp0->peek[1]);
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}
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void linear_interpolation() {
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puts("Linear interpolation:");
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const int uv_fractional_bits = 12;
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// for lane 0
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// shift and mask XXXX XXXX XXXX XXXX XXXX FFFF FFFF FFFF (accum 0)
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// to 0000 0000 000X XXXX XXXX XXXX XXXX XXX0
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// i.e. non fractional part times 2 (for uint16_t)
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interp_config cfg = interp_default_config();
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interp_config_set_shift(&cfg, uv_fractional_bits - 1);
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interp_config_set_mask(&cfg, 1, 32 - uv_fractional_bits);
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interp_config_set_blend(&cfg, true);
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interp_set_config(interp0, 0, &cfg);
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// for lane 1
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// shift XXXX XXXX XXXX XXXX XXXX FFFF FFFF FFFF (accum 0 via cross input)
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// to 0000 XXXX XXXX XXXX XXXX FFFF FFFF FFFF
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cfg = interp_default_config();
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interp_config_set_shift(&cfg, uv_fractional_bits - 8);
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interp_config_set_signed(&cfg, true);
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interp_config_set_cross_input(&cfg, true); // signed blending
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interp_set_config(interp0, 1, &cfg);
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int16_t samples[] = {0, 10, -20, -1000, 500};
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// step is 1/4 in our fractional representation
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uint step = (1 << uv_fractional_bits) / 4;
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interp0->accum[0] = 0; // initial sample_offset;
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interp0->base[2] = (uintptr_t) samples;
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for (int i = 0; i < 16; i++) {
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// result2 = samples + (lane0 raw result)
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// i.e. ptr to the first of two samples to blend between
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int16_t *sample_pair = (int16_t *) interp0->peek[2];
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interp0->base[0] = sample_pair[0];
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interp0->base[1] = sample_pair[1];
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printf("%d\t(%d%% between %d and %d)\n", (int) interp0->peek[1],
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100 * (interp0->add_raw[1] & 0xff) / 0xff,
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sample_pair[0], sample_pair[1]);
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interp0->add_raw[0] = step;
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}
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}
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void clamp() {
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puts("Clamp:");
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interp_config cfg = interp_default_config();
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interp_config_set_clamp(&cfg, true);
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interp_config_set_shift(&cfg, 2);
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// set mask according to new position of sign bit..
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interp_config_set_mask(&cfg, 0, 29);
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// ...so that the shifted value is correctly sign extended
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interp_config_set_signed(&cfg, true);
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interp_set_config(interp1, 0, &cfg);
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interp1->base[0] = 0;
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interp1->base[1] = 255;
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for (int i = -1024; i <= 1024; i += 256) {
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interp1->accum[0] = i;
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printf("%d\t%d\n", i, (int) interp1->peek[0]);
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}
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}
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/// \tag::texture_mapping[]
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void texture_mapping_setup(uint8_t *texture, uint texture_width_bits, uint texture_height_bits,
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uint uv_fractional_bits) {
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interp_config cfg = interp_default_config();
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// set add_raw flag to use raw (un-shifted and un-masked) lane accumulator value when adding
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// it to the the lane base to make the lane result
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interp_config_set_add_raw(&cfg, true);
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interp_config_set_shift(&cfg, uv_fractional_bits);
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interp_config_set_mask(&cfg, 0, texture_width_bits - 1);
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interp_set_config(interp0, 0, &cfg);
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interp_config_set_shift(&cfg, uv_fractional_bits - texture_width_bits);
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interp_config_set_mask(&cfg, texture_width_bits, texture_width_bits + texture_height_bits - 1);
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interp_set_config(interp0, 1, &cfg);
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interp0->base[2] = (uintptr_t) texture;
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}
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void texture_mapped_span(uint8_t *output, uint32_t u, uint32_t v, uint32_t du, uint32_t dv, uint count) {
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// u, v are texture coordinates in fixed point with uv_fractional_bits fractional bits
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// du, dv are texture coordinate steps across the span in same fixed point.
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interp0->accum[0] = u;
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interp0->base[0] = du;
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interp0->accum[1] = v;
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interp0->base[1] = dv;
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for (uint i = 0; i < count; i++) {
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// equivalent to
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// uint32_t sm_result0 = (accum0 >> uv_fractional_bits) & (1 << (texture_width_bits - 1);
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// uint32_t sm_result1 = (accum1 >> uv_fractional_bits) & (1 << (texture_height_bits - 1);
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// uint8_t *address = texture + sm_result0 + (sm_result1 << texture_width_bits);
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// output[i] = *address;
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// accum0 = du + accum0;
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// accum1 = dv + accum1;
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// result2 is the texture address for the current pixel;
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// popping the result advances to the next iteration
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output[i] = *(uint8_t *) interp0->pop[2];
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}
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}
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void texture_mapping() {
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puts("Affine Texture mapping (with texture wrap):");
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uint8_t texture[] = {
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0x00, 0x01, 0x02, 0x03,
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0x10, 0x11, 0x12, 0x13,
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0x20, 0x21, 0x22, 0x23,
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0x30, 0x31, 0x32, 0x33,
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};
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// 4x4 texture
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texture_mapping_setup(texture, 2, 2, 16);
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uint8_t output[12];
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uint32_t du = 65536 / 2; // step of 1/2
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uint32_t dv = 65536 / 3; // step of 1/3
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texture_mapped_span(output, 0, 0, du, dv, 12);
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for (uint i = 0; i < 12; i++) {
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printf("0x%02x\n", output[i]);
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}
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}
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/// \end::texture_mapping[]
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int main() {
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stdio_init_all();
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puts("Interpolator example");
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times_table();
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moving_mask();
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cross_lanes();
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simple_blend1();
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simple_blend2();
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simple_blend3();
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clamp();
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linear_interpolation();
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texture_mapping();
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return 0;
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} |