95 lines
3.5 KiB
Plaintext
95 lines
3.5 KiB
Plaintext
;
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; Copyright (c) 2020 Raspberry Pi (Trading) Ltd.
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;
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; SPDX-License-Identifier: BSD-3-Clause
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;
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.program manchester_tx
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.side_set 1 opt
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; Transmit one bit every 12 cycles. a '0' is encoded as a high-low sequence
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; (each part lasting half a bit period, or 6 cycles) and a '1' is encoded as a
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; low-high sequence.
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;
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; Side-set bit 0 must be mapped to the GPIO used for TX.
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; Autopull must be enabled -- this program does not care about the threshold.
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; The program starts at the public label 'start'.
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.wrap_target
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do_1:
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nop side 0 [5] ; Low for 6 cycles (5 delay, +1 for nop)
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jmp get_bit side 1 [3] ; High for 4 cycles. 'get_bit' takes another 2 cycles
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do_0:
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nop side 1 [5] ; Output high for 6 cycles
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nop side 0 [3] ; Output low for 4 cycles
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public start:
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get_bit:
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out x, 1 ; Always shift out one bit from OSR to X, so we can
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jmp !x do_0 ; branch on it. Autopull refills the OSR when empty.
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.wrap
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% c-sdk {
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static inline void manchester_tx_program_init(PIO pio, uint sm, uint offset, uint pin, float div) {
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pio_sm_set_pins_with_mask(pio, sm, 0, 1u << pin);
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pio_sm_set_consecutive_pindirs(pio, sm, pin, 1, true);
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pio_gpio_init(pio, pin);
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pio_sm_config c = manchester_tx_program_get_default_config(offset);
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sm_config_set_sideset_pins(&c, pin);
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sm_config_set_out_shift(&c, true, true, 32);
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sm_config_set_fifo_join(&c, PIO_FIFO_JOIN_TX);
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sm_config_set_clkdiv(&c, div);
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pio_sm_init(pio, sm, offset + manchester_tx_offset_start, &c);
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pio_sm_set_enabled(pio, sm, true);
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}
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%}
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.program manchester_rx
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; Assumes line is idle low, first bit is 0
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; One bit is 12 cycles
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; a '0' is encoded as 10
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; a '1' is encoded as 01
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;
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; Both the IN base and the JMP pin mapping must be pointed at the GPIO used for RX.
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; Autopush must be enabled.
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; Before enabling the SM, it should be placed in a 'wait 1, pin` state, so that
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; it will not start sampling until the initial line idle state ends.
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start_of_0: ; We are 0.25 bits into a 0 - signal is high
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wait 0 pin 0 ; Wait for the 1->0 transition - at this point we are 0.5 into the bit
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in y, 1 [8] ; Emit a 0, sleep 3/4 of a bit
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jmp pin start_of_0 ; If signal is 1 again, it's another 0 bit, otherwise it's a 1
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.wrap_target
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start_of_1: ; We are 0.25 bits into a 1 - signal is 1
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wait 1 pin 0 ; Wait for the 0->1 transition - at this point we are 0.5 into the bit
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in x, 1 [8] ; Emit a 1, sleep 3/4 of a bit
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jmp pin start_of_0 ; If signal is 0 again, it's another 1 bit otherwise it's a 0
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.wrap
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% c-sdk {
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static inline void manchester_rx_program_init(PIO pio, uint sm, uint offset, uint pin, float div) {
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pio_sm_set_consecutive_pindirs(pio, sm, pin, 1, false);
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pio_gpio_init(pio, pin);
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pio_sm_config c = manchester_rx_program_get_default_config(offset);
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sm_config_set_in_pins(&c, pin); // for WAIT
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sm_config_set_jmp_pin(&c, pin); // for JMP
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sm_config_set_in_shift(&c, true, true, 32);
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sm_config_set_fifo_join(&c, PIO_FIFO_JOIN_RX);
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sm_config_set_clkdiv(&c, div);
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pio_sm_init(pio, sm, offset, &c);
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// X and Y are set to 0 and 1, to conveniently emit these to ISR/FIFO.
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pio_sm_exec(pio, sm, pio_encode_set(pio_x, 1));
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pio_sm_exec(pio, sm, pio_encode_set(pio_y, 0));
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// Assume line is idle low, and first transmitted bit is 0. Put SM in a
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// wait state before enabling. RX will begin once the first 0 symbol is
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// detected.
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pio_sm_exec(pio, sm, pio_encode_wait_pin(1, 0) | pio_encode_delay(2));
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pio_sm_set_enabled(pio, sm, true);
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}
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%}
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