95 lines
3.4 KiB
C
95 lines
3.4 KiB
C
/**
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* Copyright (c) 2020 Raspberry Pi (Trading) Ltd.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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// Show how to reconfigure and restart a channel in a channel completion
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// interrupt handler.
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//
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// Our DMA channel will transfer data to a PIO state machine, which is
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// configured to serialise the raw bits that we push, one by one. We're going
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// to use this to do some crude LED PWM by repeatedly sending values with the
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// right balance of 1s and 0s. (note there are better ways to do PWM with PIO
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// -- see the PIO PWM example).
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//
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// Once the channel has sent a predetermined amount of data, it will halt, and
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// raise an interrupt flag. The processor will enter the interrupt handler in
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// response to this, where it will reconfigure and restart the channel. This
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// repeats.
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#include <stdio.h>
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#include "hardware/dma.h"
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#include "hardware/irq.h"
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#include "pio_serialiser.pio.h"
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// PIO sends one bit per 10 system clock cycles. DMA sends the same 32-bit
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// value 10 000 times before halting. This means we cycle through the 32 PWM
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// levels roughly once per second.
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#define PIO_SERIAL_CLKDIV 10.f
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#define PWM_REPEAT_COUNT 10000
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#define N_PWM_LEVELS 32
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int dma_chan;
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void dma_handler() {
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static int pwm_level = 0;
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static uint32_t wavetable[N_PWM_LEVELS];
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static bool first_run = true;
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// Entry number `i` has `i` one bits and `(32 - i)` zero bits.
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if (first_run) {
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first_run = false;
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for (int i = 0; i < N_PWM_LEVELS; ++i)
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wavetable[i] = ~(~0u << i);
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}
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// Clear the interrupt request.
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dma_hw->ints0 = 1u << dma_chan;
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// Give the channel a new wave table entry to read from, and re-trigger it
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dma_channel_set_read_addr(dma_chan, &wavetable[pwm_level], true);
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pwm_level = (pwm_level + 1) % N_PWM_LEVELS;
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}
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int main() {
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#ifndef PICO_DEFAULT_LED_PIN
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#warning dma/channel_irq example requires a board with a regular LED
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#else
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// Set up a PIO state machine to serialise our bits
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uint offset = pio_add_program(pio0, &pio_serialiser_program);
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pio_serialiser_program_init(pio0, 0, offset, PICO_DEFAULT_LED_PIN, PIO_SERIAL_CLKDIV);
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// Configure a channel to write the same word (32 bits) repeatedly to PIO0
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// SM0's TX FIFO, paced by the data request signal from that peripheral.
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dma_chan = dma_claim_unused_channel(true);
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dma_channel_config c = dma_channel_get_default_config(dma_chan);
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channel_config_set_transfer_data_size(&c, DMA_SIZE_32);
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channel_config_set_read_increment(&c, false);
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channel_config_set_dreq(&c, DREQ_PIO0_TX0);
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dma_channel_configure(
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dma_chan,
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&c,
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&pio0_hw->txf[0], // Write address (only need to set this once)
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NULL, // Don't provide a read address yet
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PWM_REPEAT_COUNT, // Write the same value many times, then halt and interrupt
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false // Don't start yet
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);
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// Tell the DMA to raise IRQ line 0 when the channel finishes a block
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dma_channel_set_irq0_enabled(dma_chan, true);
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// Configure the processor to run dma_handler() when DMA IRQ 0 is asserted
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irq_set_exclusive_handler(DMA_IRQ_0, dma_handler);
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irq_set_enabled(DMA_IRQ_0, true);
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// Manually call the handler once, to trigger the first transfer
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dma_handler();
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// Everything else from this point is interrupt-driven. The processor has
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// time to sit and think about its early retirement -- maybe open a bakery?
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while (true)
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tight_loop_contents();
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#endif
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}
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