4f64f3af80
The initial bit transition would be set even if the queue stalled. The state machine still takes 16 cycles per bit The next bit starts on state 1 and 9 instead of 0 and 8 so the timing is the same as before
105 lines
3.8 KiB
Plaintext
105 lines
3.8 KiB
Plaintext
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; Copyright (c) 2020 Raspberry Pi (Trading) Ltd.
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;
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; SPDX-License-Identifier: BSD-3-Clause
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;
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.program differential_manchester_tx
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.side_set 1 opt
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; Transmit one bit every 16 cycles. In each bit period:
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; - A '0' is encoded as a transition at the start of the bit period
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; - A '1' is encoded as a transition at the start *and* in the middle
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;
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; Side-set bit 0 must be mapped to the data output pin.
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; Autopull must be enabled.
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public start:
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initial_high:
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out x, 1 ; Start of bit period: always assert transition
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jmp !x high_0 side 1 [6] ; Test the data bit we just shifted out of OSR
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high_1:
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nop
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jmp initial_high side 0 [6] ; For `1` bits, also transition in the middle
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high_0:
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jmp initial_low [7] ; Otherwise, the line is stable in the middle
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initial_low:
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out x, 1 ; Always shift 1 bit from OSR to X so we can
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jmp !x low_0 side 0 [6] ; branch on it. Autopull refills OSR for us.
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low_1:
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nop
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jmp initial_low side 1 [6] ; If there are two transitions, return to
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low_0:
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jmp initial_high [7] ; the initial line state is flipped!
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% c-sdk {
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static inline void differential_manchester_tx_program_init(PIO pio, uint sm, uint offset, uint pin, float div) {
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pio_sm_set_pins_with_mask(pio, sm, 0, 1u << pin);
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pio_sm_set_consecutive_pindirs(pio, sm, pin, 1, true);
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pio_gpio_init(pio, pin);
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pio_sm_config c = differential_manchester_tx_program_get_default_config(offset);
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sm_config_set_sideset_pins(&c, pin);
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sm_config_set_out_shift(&c, true, true, 32);
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sm_config_set_fifo_join(&c, PIO_FIFO_JOIN_TX);
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sm_config_set_clkdiv(&c, div);
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pio_sm_init(pio, sm, offset + differential_manchester_tx_offset_start, &c);
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// Execute a blocking pull so that we maintain the initial line state until data is available
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pio_sm_exec(pio, sm, pio_encode_pull(false, true));
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pio_sm_set_enabled(pio, sm, true);
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}
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%}
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.program differential_manchester_rx
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; Assumes line is idle low
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; One bit is 16 cycles. In each bit period:
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; - A '0' is encoded as a transition at time 0
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; - A '1' is encoded as a transition at time 0 and a transition at time T/2
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;
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; The IN mapping and the JMP pin select must both be mapped to the GPIO used for
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; RX data. Autopush must be enabled.
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public start:
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initial_high: ; Find rising edge at start of bit period
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wait 1 pin, 0 [11] ; Delay to eye of second half-period (i.e 3/4 of way
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jmp pin high_0 ; through bit) and branch on RX pin high/low.
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high_1:
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in x, 1 ; Second transition detected (a `1` data symbol)
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jmp initial_high
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high_0:
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in y, 1 [1] ; Line still high, no centre transition (data is `0`)
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; Fall-through
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.wrap_target
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initial_low: ; Find falling edge at start of bit period
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wait 0 pin, 0 [11] ; Delay to eye of second half-period
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jmp pin low_1
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low_0:
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in y, 1 ; Line still low, no centre transition (data is `0`)
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jmp initial_high
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low_1: ; Second transition detected (data is `1`)
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in x, 1 [1]
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.wrap
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% c-sdk {
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static inline void differential_manchester_rx_program_init(PIO pio, uint sm, uint offset, uint pin, float div) {
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pio_sm_set_consecutive_pindirs(pio, sm, pin, 1, false);
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pio_gpio_init(pio, pin);
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pio_sm_config c = differential_manchester_rx_program_get_default_config(offset);
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sm_config_set_in_pins(&c, pin); // for WAIT
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sm_config_set_jmp_pin(&c, pin); // for JMP
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sm_config_set_in_shift(&c, true, true, 32);
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sm_config_set_fifo_join(&c, PIO_FIFO_JOIN_RX);
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sm_config_set_clkdiv(&c, div);
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pio_sm_init(pio, sm, offset, &c);
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// X and Y are set to 0 and 1, to conveniently emit these to ISR/FIFO.
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pio_sm_exec(pio, sm, pio_encode_set(pio_x, 1));
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pio_sm_exec(pio, sm, pio_encode_set(pio_y, 0));
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pio_sm_set_enabled(pio, sm, true);
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}
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%}
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