Fiy a typo and clarify one comment (#189)
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@ -50,7 +50,7 @@ int main() {
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}
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}
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// We set the outbound DMA to transfer from a memory buffer to the SPI transmit FIFO paced by the SPI TX FIFO DREQ
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// We set the outbound DMA to transfer from a memory buffer to the SPI transmit FIFO paced by the SPI TX FIFO DREQ
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// The default is for the read address to increment every element (in this case 1 byte - DMA_SIZE_8)
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// The default is for the read address to increment every element (in this case 1 byte = DMA_SIZE_8)
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// and for the write address to remain unchanged.
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// and for the write address to remain unchanged.
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printf("Configure TX DMA\n");
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printf("Configure TX DMA\n");
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@ -66,7 +66,7 @@ int main() {
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printf("Configure RX DMA\n");
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printf("Configure RX DMA\n");
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// We set the inbound DMA to transfer from the SPI receive FIFO to a memory buffer paced by the SPI RX FIFO DREQ
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// We set the inbound DMA to transfer from the SPI receive FIFO to a memory buffer paced by the SPI RX FIFO DREQ
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// We coinfigure the read address to remain unchanged for each element, but the write
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// We configure the read address to remain unchanged for each element, but the write
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// address to increment (so data is written throughout the buffer)
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// address to increment (so data is written throughout the buffer)
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c = dma_channel_get_default_config(dma_rx);
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c = dma_channel_get_default_config(dma_rx);
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channel_config_set_transfer_data_size(&c, DMA_SIZE_8);
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channel_config_set_transfer_data_size(&c, DMA_SIZE_8);
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