Properly reset peripherals, update README.
This commit is contained in:
Dario Nieuwenhuis
parent
8f38b191ab
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9dc0745950
@ -1,5 +1,6 @@
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[target.'cfg(all(target_arch = "arm", target_os = "none"))']
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runner = "./probe-run.sh"
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#runner = "./probe-run.sh"
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runner = "probe-run-rp --chip RP2040"
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rustflags = [
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"-C", "link-arg=--nmagic",
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@ -6,16 +6,15 @@ name = "rp-test"
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version = "0.1.0"
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[dependencies]
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cortex-m = { version = "0.7.0", features = ["inline-asm"] }
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cortex-m = { version = "0.7.1", features = ["inline-asm"] }
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cortex-m-rt = "0.6.10"
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cortex-m-semihosting = "0.3.3"
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defmt = "0.1.3"
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defmt-rtt = "0.1.0"
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panic-probe = "0.1.0"
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rp2040-pac = { git = "https://github.com/rp-rs/rp2040-pac", branch="main" }
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rp2040-boot2 = { git = "https://github.com/rp-rs/rp2040-boot2-rs", branch="vector" }
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rp2040-boot2 = { git = "https://github.com/rp-rs/rp2040-boot2-rs", branch="main" }
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#rp2040-pac = { path = "../rp2040-pac" }
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#rp2040-boot2 = { path = "../rp2040-boot2-rs" }
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26
README.md
26
README.md
@ -1,17 +1,25 @@
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# Raspberry pico RP2040 rust test!
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How to run:
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## Requirements
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git clone https://github.com/Dirbaio/rp2040-rust-test
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git clone https://github.com/Dirbaio/rp2040-pac
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git clone https://github.com/Dirbaio/probe-run
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git clone https://github.com/Dirbaio/probe-rs
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cd rp2040-rust-test
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cargo run
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- Recent nightly Rust
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- `probe-run-rp` installed.
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- A CMSIS-DAP probe. (JLink probes sort of work but are very unstable. Other probes won't work at all)
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`probe-run-rp` is a version of `probe-run` using a `probe-rs` fork with support for the RP2040 chip. To install it use the following command.
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cargo install --git https://github.com/rp-rs/probe-run --branch main
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Note that this installs the binary with name `probe-run-rp`, so you can still have the original `probe-run` installed in parallel. This is important because `probe-run-rp` ONLY works with the RP2040 chip.
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## Running
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Just do `cargo run` :)
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# License
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## License
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This thingy is licensed under either of
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This project is icensed under either of
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- Apache License, Version 2.0 ([LICENSE-APACHE](LICENSE-APACHE) or
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http://www.apache.org/licenses/LICENSE-2.0)
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12
memory.x
12
memory.x
@ -1,13 +1,13 @@
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MEMORY {
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BOOT_LOADER : ORIGIN = 0x10000000, LENGTH = 0x100
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FLASH : ORIGIN = 0x10000100, LENGTH = 2048K - 0x100
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RAM : ORIGIN = 0x20000000, LENGTH = 256K
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BOOT2 : ORIGIN = 0x10000000, LENGTH = 0x100
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FLASH : ORIGIN = 0x10000100, LENGTH = 2048K - 0x100
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RAM : ORIGIN = 0x20000000, LENGTH = 256K
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}
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SECTIONS {
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/* ### Boot loader */
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.boot_loader ORIGIN(BOOT_LOADER) :
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.boot2 ORIGIN(BOOT2) :
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{
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KEEP(*(.boot_loader));
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} > BOOT_LOADER
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KEEP(*(.boot2));
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} > BOOT2
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} INSERT BEFORE .text;
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93
src/main.rs
93
src/main.rs
@ -1,17 +1,18 @@
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#![no_std]
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#![no_main]
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#![feature(asm)]
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use core::sync::atomic::{AtomicUsize, Ordering};
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use cortex_m_rt::entry;
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use defmt::*;
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use defmt_rtt as _; // global logger
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use defmt_rtt as _;
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use panic_probe as _;
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// this adds boot2 to the .boot_loader section
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// linker script then places that at start of flash.
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use rp2040_boot2 as _;
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use rp2040_pac as pac;
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#[link_section = ".boot2"]
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#[used]
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pub static BOOT2: [u8; 256] = rp2040_boot2::BOOT_LOADER;
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#[defmt::timestamp]
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fn timestamp() -> u64 {
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static COUNT: AtomicUsize = AtomicUsize::new(0);
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@ -21,12 +22,90 @@ fn timestamp() -> u64 {
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n as u64
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}
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mod reset_bits {
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pub const ALL: u32 = 0x01ffffff;
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pub const USBCTRL: u32 = 0x01000000;
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pub const UART1: u32 = 0x00800000;
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pub const UART0: u32 = 0x00400000;
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pub const TIMER: u32 = 0x00200000;
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pub const TBMAN: u32 = 0x00100000;
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pub const SYSINFO: u32 = 0x00080000;
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pub const SYSCFG: u32 = 0x00040000;
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pub const SPI1: u32 = 0x00020000;
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pub const SPI0: u32 = 0x00010000;
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pub const RTC: u32 = 0x00008000;
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pub const PWM: u32 = 0x00004000;
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pub const PLL_USB: u32 = 0x00002000;
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pub const PLL_SYS: u32 = 0x00001000;
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pub const PIO1: u32 = 0x00000800;
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pub const PIO0: u32 = 0x00000400;
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pub const PADS_QSPI: u32 = 0x00000200;
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pub const PADS_BANK0: u32 = 0x00000100;
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pub const JTAG: u32 = 0x00000080;
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pub const IO_QSPI: u32 = 0x00000040;
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pub const IO_BANK0: u32 = 0x00000020;
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pub const I2C1: u32 = 0x00000010;
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pub const I2C0: u32 = 0x00000008;
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pub const DMA: u32 = 0x00000004;
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pub const BUSCTRL: u32 = 0x00000002;
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pub const ADC: u32 = 0x00000001;
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}
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struct Resets {
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inner: pac::RESETS,
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}
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impl Resets {
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fn new(inner: pac::RESETS) -> Self {
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Self { inner }
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}
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fn reset(&self, bits: u32) {
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self.inner.reset.write(|w| unsafe { w.bits(bits) })
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}
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fn unreset_wait(&self, bits: u32) {
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// TODO use the "atomic clear" register version
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self.inner
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.reset
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.modify(|r, w| unsafe { w.bits(r.bits() & !bits) });
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while ((!self.inner.reset_done.read().bits()) & bits) != 0 {}
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}
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}
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fn setup_chip(resets: pac::RESETS) {
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// Now reset all the peripherals, except QSPI and XIP (we're using those
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// to execute from external flash!)
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let resets = Resets::new(resets);
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// Reset everything except:
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// - QSPI (we're using it to run this code!)
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// - PLLs (it may be suicide if that's what's clocking us)
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resets.reset(
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!(reset_bits::IO_QSPI | reset_bits::PADS_QSPI | reset_bits::PLL_SYS | reset_bits::PLL_USB),
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);
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resets.unreset_wait(
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reset_bits::ALL
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& !(reset_bits::ADC
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| reset_bits::RTC
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| reset_bits::SPI0
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| reset_bits::SPI1
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| reset_bits::UART0
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| reset_bits::UART1
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| reset_bits::USBCTRL),
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);
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}
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#[entry]
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fn main() -> ! {
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info!("Hello World!");
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let p = pac::Peripherals::take().unwrap();
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setup_chip(p.RESETS);
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loop {
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info!("on!");
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p.IO_BANK0.gpio25_ctrl.write(|w| {
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@ -35,7 +114,7 @@ fn main() -> ! {
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w
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});
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cortex_m::asm::delay(64_000_000);
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cortex_m::asm::delay(1_000_000);
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info!("off!");
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p.IO_BANK0.gpio25_ctrl.write(|w| {
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@ -44,6 +123,6 @@ fn main() -> ! {
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w
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});
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cortex_m::asm::delay(64_000_000);
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cortex_m::asm::delay(1_000_000);
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}
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}
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