5ea934d4ba
This change adds the possibility to perform compliance testing with STM32 systems by directly exposing SMI when needed. Users can then use this to configure PHY registers for test modes.
78 lines
2.1 KiB
Rust
78 lines
2.1 KiB
Rust
#![no_std]
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#![no_main]
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use defmt::*;
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use embassy_executor::Spawner;
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use embassy_stm32::eth::generic_smi::GenericSMI;
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use embassy_stm32::eth::{Ethernet, PacketQueue, StationManagement};
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use embassy_stm32::time::Hertz;
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use embassy_stm32::{bind_interrupts, eth, peripherals, rng, Config};
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use embassy_time::Timer;
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use static_cell::StaticCell;
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use {defmt_rtt as _, panic_probe as _};
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bind_interrupts!(struct Irqs {
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ETH => eth::InterruptHandler;
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HASH_RNG => rng::InterruptHandler<peripherals::RNG>;
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});
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#[embassy_executor::main]
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async fn main(_spawner: Spawner) -> ! {
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let mut config = Config::default();
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{
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use embassy_stm32::rcc::*;
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config.rcc.hse = Some(Hse {
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freq: Hertz(8_000_000),
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mode: HseMode::Bypass,
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});
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config.rcc.pll_src = PllSource::HSE;
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config.rcc.pll = Some(Pll {
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prediv: PllPreDiv::DIV4,
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mul: PllMul::MUL180,
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divp: Some(PllPDiv::DIV2), // 8mhz / 4 * 180 / 2 = 180Mhz.
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divq: None,
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divr: None,
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});
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config.rcc.ahb_pre = AHBPrescaler::DIV1;
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config.rcc.apb1_pre = APBPrescaler::DIV4;
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config.rcc.apb2_pre = APBPrescaler::DIV2;
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config.rcc.sys = Sysclk::PLL1_P;
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}
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let p = embassy_stm32::init(config);
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info!("Hello Compliance World!");
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let mac_addr = [0x00, 0x00, 0xDE, 0xAD, 0xBE, 0xEF];
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const PHY_ADDR: u8 = 0;
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static PACKETS: StaticCell<PacketQueue<4, 4>> = StaticCell::new();
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let mut device = Ethernet::new(
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PACKETS.init(PacketQueue::<4, 4>::new()),
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p.ETH,
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Irqs,
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p.PA1,
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p.PA2,
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p.PC1,
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p.PA7,
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p.PC4,
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p.PC5,
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p.PG13,
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p.PB13,
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p.PG11,
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GenericSMI::new(PHY_ADDR),
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mac_addr,
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);
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let sm = unsafe { device.station_management() };
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// Just an example. Exact register settings depend on the specific PHY and test.
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sm.smi_write(PHY_ADDR, 0, 0x2100);
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sm.smi_write(PHY_ADDR, 11, 0xA000);
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// NB: Remember to reset the PHY after testing before starting the networking stack
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loop {
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Timer::after_secs(1).await;
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}
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}
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