290 lines
8.4 KiB
Rust
290 lines
8.4 KiB
Rust
//! Async low power Serial.
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//!
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//! The peripheral is autmatically enabled and disabled as required to save power.
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//! Lowest power consumption can only be guaranteed if the send receive futures
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//! are dropped correctly (e.g. not using `mem::forget()`).
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use core::future::Future;
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use core::task::{Context, Poll};
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use embassy::interrupt::OwnedInterrupt;
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use embassy::util::Signal;
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use embedded_dma::{StaticReadBuffer, StaticWriteBuffer, WriteBuffer};
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use crate::hal::dma::config::DmaConfig;
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use crate::hal::dma::traits::{PeriAddress, Stream};
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use crate::hal::dma::{
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Channel4, MemoryToPeripheral, PeripheralToMemory, Stream2, Stream7, StreamsTuple, Transfer,
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};
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use crate::hal::gpio::gpioa::{PA10, PA9};
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use crate::hal::gpio::{Alternate, AF7};
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use crate::hal::prelude::*;
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use crate::hal::rcc::Clocks;
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use crate::hal::serial::config::{
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Config as SerialConfig, DmaConfig as SerialDmaConfig, Parity, StopBits, WordLength,
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};
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use crate::hal::serial::{Event as SerialEvent, Serial as HalSerial};
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use crate::hal::time::Bps;
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use crate::interrupt;
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use crate::pac::Interrupt;
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use crate::pac::{DMA2, USART1};
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/// Interface to the Serial peripheral
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pub struct Serial<USART: PeriAddress<MemSize = u8>, TSTREAM: Stream, RSTREAM: Stream> {
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// tx_transfer: Transfer<Stream7<DMA2>, Channel4, USART1, MemoryToPeripheral, &mut [u8; 20]>,
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// rx_transfer: Transfer<Stream2<DMA2>, Channel4, USART1, PeripheralToMemory, &mut [u8; 20]>,
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tx_stream: Option<TSTREAM>,
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rx_stream: Option<RSTREAM>,
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usart: Option<USART>,
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}
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struct State {
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tx_done: Signal<()>,
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rx_done: Signal<()>,
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}
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static STATE: State = State {
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tx_done: Signal::new(),
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rx_done: Signal::new(),
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};
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impl Serial<USART1, Stream7<DMA2>, Stream2<DMA2>> {
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pub fn new(
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txd: PA9<Alternate<AF7>>,
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rxd: PA10<Alternate<AF7>>,
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tx_int: interrupt::DMA2_STREAM2Interrupt,
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rx_int: interrupt::DMA2_STREAM7Interrupt,
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dma: DMA2,
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usart: USART1,
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parity: Parity,
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baudrate: Bps,
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clocks: Clocks,
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) -> Self {
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let serial = HalSerial::usart1(
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usart,
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(txd, rxd),
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SerialConfig {
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baudrate: baudrate,
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wordlength: WordLength::DataBits8,
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parity: Parity::ParityNone,
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stopbits: StopBits::STOP1,
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dma: SerialDmaConfig::TxRx,
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},
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clocks,
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)
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.unwrap();
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let (usart, _) = serial.release();
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// serial.listen(SerialEvent::Idle);
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// Register ISR
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tx_int.set_handler(Self::on_tx_irq);
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tx_int.unpend();
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tx_int.enable();
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rx_int.set_handler(Self::on_rx_irq);
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rx_int.unpend();
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rx_int.enable();
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let streams = StreamsTuple::new(dma);
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Serial {
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tx_stream: Some(streams.7),
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rx_stream: Some(streams.2),
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usart: Some(usart),
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}
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}
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unsafe fn on_tx_irq() {
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STATE.tx_done.signal(());
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}
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unsafe fn on_rx_irq() {
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STATE.rx_done.signal(());
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}
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/// Sends serial data.
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///
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/// `tx_buffer` is marked as static as per `embedded-dma` requirements.
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/// It it safe to use a buffer with a non static lifetime if memory is not
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/// reused until the future has finished.
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pub fn send<'a, B>(
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&'a mut self,
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tx_buffer: B,
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) -> SendFuture<'a, B, USART1, Stream7<DMA2>, Stream2<DMA2>, Channel4>
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where
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B: WriteBuffer<Word = u8> + 'static,
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{
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let tx_stream = self.tx_stream.take().unwrap();
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let usart = self.usart.take().unwrap();
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let mut tx_transfer = Transfer::init(
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tx_stream,
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usart,
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tx_buffer,
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None,
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DmaConfig::default()
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.transfer_complete_interrupt(true)
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.memory_increment(true)
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.double_buffer(false),
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);
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STATE.tx_done.reset();
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SendFuture {
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Serial: self,
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tx_transfer: Some(tx_transfer),
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// tx_stream: Some(tx_stream),
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// usart: Some(usart),
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}
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}
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/// Receives serial data.
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///
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/// The future is pending until the buffer is completely filled.
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/// A common pattern is to use [`stop()`](ReceiveFuture::stop) to cancel
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/// unfinished transfers after a timeout to prevent lockup when no more data
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/// is incoming.
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///
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/// `rx_buffer` is marked as static as per `embedded-dma` requirements.
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/// It it safe to use a buffer with a non static lifetime if memory is not
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/// reused until the future has finished.
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pub fn receive<'a, B>(
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&'a mut self,
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rx_buffer: B,
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) -> ReceiveFuture<'a, B, USART1, Stream7<DMA2>, Stream2<DMA2>, Channel4>
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where
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B: WriteBuffer<Word = u8> + 'static,
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{
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let rx_stream = self.rx_stream.take().unwrap();
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let usart = self.usart.take().unwrap();
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let mut rx_transfer = Transfer::init(
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rx_stream,
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usart,
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rx_buffer,
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None,
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DmaConfig::default()
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.transfer_complete_interrupt(true)
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.half_transfer_interrupt(true)
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.memory_increment(true)
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.double_buffer(false),
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);
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STATE.rx_done.reset();
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ReceiveFuture {
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Serial: self,
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rx_transfer: Some(rx_transfer),
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}
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}
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}
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/// Future for the [`LowPowerSerial::send()`] method.
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pub struct SendFuture<
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'a,
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B: WriteBuffer<Word = u8> + 'static,
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USART: PeriAddress<MemSize = u8>,
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TSTREAM: Stream,
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RSTREAM: Stream,
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CHANNEL,
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> {
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Serial: &'a mut Serial<USART, TSTREAM, RSTREAM>,
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tx_transfer: Option<Transfer<TSTREAM, CHANNEL, USART, MemoryToPeripheral, B>>,
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}
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// impl<'a, B> Drop for SendFuture<'a, B>
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// where
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// B: WriteBuffer<Word = u8> + 'static,
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// {
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// fn drop(self: &mut Self) {}
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// }
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impl<'a, B> Future for SendFuture<'a, B, USART1, Stream7<DMA2>, Stream2<DMA2>, Channel4>
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where
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B: WriteBuffer<Word = u8> + 'static,
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{
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type Output = ();
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fn poll(self: core::pin::Pin<&mut Self>, cx: &mut Context<'_>) -> Poll<()> {
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let Self {
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Serial,
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tx_transfer,
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} = unsafe { self.get_unchecked_mut() };
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let mut taken = tx_transfer.take().unwrap();
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if Stream7::<DMA2>::get_transfer_complete_flag() {
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let (tx_stream, usart, buf, _) = taken.free();
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Serial.tx_stream.replace(tx_stream);
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Serial.usart.replace(usart);
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Poll::Ready(())
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} else {
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// waker_interrupt!(DMA2_STREAM7, cx.waker().clone());
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taken.start(|_usart| {});
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tx_transfer.replace(taken);
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// Poll::Pending
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STATE.tx_done.poll_wait(cx)
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}
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}
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}
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/// Future for the [`Serial::receive()`] method.
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pub struct ReceiveFuture<
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'a,
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B: WriteBuffer<Word = u8> + 'static,
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USART: PeriAddress<MemSize = u8>,
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TSTREAM: Stream,
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RSTREAM: Stream,
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CHANNEL,
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> {
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Serial: &'a mut Serial<USART, TSTREAM, RSTREAM>,
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rx_transfer: Option<Transfer<RSTREAM, CHANNEL, USART, PeripheralToMemory, B>>,
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}
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// impl<'a, B> Drop for ReceiveFuture<'a, B, USART1, Stream7<DMA2>, Channel4>
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// where
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// B: WriteBuffer<Word = u8> + 'static,
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// {
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// fn drop(self: &mut Self) {}
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// }
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impl<'a, B> Future for ReceiveFuture<'a, B, USART1, Stream7<DMA2>, Stream2<DMA2>, Channel4>
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where
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B: WriteBuffer<Word = u8> + 'static + Unpin,
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{
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type Output = B;
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fn poll(self: core::pin::Pin<&mut Self>, cx: &mut Context<'_>) -> Poll<B> {
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let Self {
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Serial,
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rx_transfer,
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} = unsafe { self.get_unchecked_mut() };
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let mut taken = rx_transfer.take().unwrap();
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if Stream7::<DMA2>::get_transfer_complete_flag() {
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let (rx_stream, usart, buf, _) = rx_transfer.take().unwrap().free();
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Serial.rx_stream.replace(rx_stream);
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Serial.usart.replace(usart);
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Poll::Ready(buf)
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} else {
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// waker_interrupt!(DMA2_STREAM2, cx.waker().clone());
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taken.start(|_usart| {});
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rx_transfer.replace(taken);
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STATE.rx_done.poll_wait(cx);
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/*
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Note: we have to do this because rx_transfer owns the buffer and we can't
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access it until the transfer is completed. Therefore we can't pass
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the buffer to poll_wait, but we still need to be woken.
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*/
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Poll::Pending
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}
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}
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}
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