437 lines
14 KiB
Rust
437 lines
14 KiB
Rust
use core::marker::PhantomData;
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use core::mem;
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use core::sync::atomic::{compiler_fence, Ordering};
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use embassy_hal_internal::{into_ref, Peripheral};
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use stm32_metapac::adc::vals::SampleTime;
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use crate::adc::{Adc, AdcChannel, Instance, RxDma};
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use crate::dma::ringbuffer::OverrunError;
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use crate::dma::{Priority, ReadableRingBuffer, TransferOptions};
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use crate::pac::adc::vals;
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use crate::rcc;
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fn clear_interrupt_flags(r: crate::pac::adc::Adc) {
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r.sr().modify(|regs| {
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regs.set_eoc(false);
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regs.set_ovr(false);
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});
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}
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#[derive(PartialOrd, PartialEq, Debug, Clone, Copy)]
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pub enum Sequence {
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One,
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Two,
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Three,
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Four,
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Five,
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Six,
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Seven,
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Eight,
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Nine,
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Ten,
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Eleven,
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Twelve,
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Thirteen,
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Fourteen,
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Fifteen,
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Sixteen,
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}
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impl From<Sequence> for u8 {
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fn from(s: Sequence) -> u8 {
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match s {
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Sequence::One => 0,
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Sequence::Two => 1,
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Sequence::Three => 2,
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Sequence::Four => 3,
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Sequence::Five => 4,
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Sequence::Six => 5,
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Sequence::Seven => 6,
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Sequence::Eight => 7,
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Sequence::Nine => 8,
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Sequence::Ten => 9,
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Sequence::Eleven => 10,
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Sequence::Twelve => 11,
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Sequence::Thirteen => 12,
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Sequence::Fourteen => 13,
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Sequence::Fifteen => 14,
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Sequence::Sixteen => 15,
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}
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}
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}
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impl From<u8> for Sequence {
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fn from(val: u8) -> Self {
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match val {
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0 => Sequence::One,
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1 => Sequence::Two,
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2 => Sequence::Three,
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3 => Sequence::Four,
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4 => Sequence::Five,
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5 => Sequence::Six,
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6 => Sequence::Seven,
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7 => Sequence::Eight,
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8 => Sequence::Nine,
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9 => Sequence::Ten,
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10 => Sequence::Eleven,
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11 => Sequence::Twelve,
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12 => Sequence::Thirteen,
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13 => Sequence::Fourteen,
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14 => Sequence::Fifteen,
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15 => Sequence::Sixteen,
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_ => panic!("Invalid sequence number"),
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}
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}
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}
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pub struct RingBufferedAdc<'d, T: Instance> {
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_phantom: PhantomData<T>,
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ring_buf: ReadableRingBuffer<'d, u16>,
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}
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impl<'d, T: Instance> Adc<'d, T> {
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/// Configures the ADC to use a DMA ring buffer for continuous data acquisition.
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///
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/// The `dma_buf` should be large enough to prevent DMA buffer overrun.
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/// The length of the `dma_buf` should be a multiple of the ADC channel count.
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/// For example, if 3 channels are measured, its length can be 3 * 40 = 120 measurements.
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///
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/// `read` method is used to read out measurements from the DMA ring buffer, and its buffer should be exactly half of the `dma_buf` length.
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/// It is critical to call `read` frequently to prevent DMA buffer overrun.
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///
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/// [`read`]: #method.read
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pub fn into_ring_buffered(
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self,
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dma: impl Peripheral<P = impl RxDma<T>> + 'd,
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dma_buf: &'d mut [u16],
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) -> RingBufferedAdc<'d, T> {
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assert!(!dma_buf.is_empty() && dma_buf.len() <= 0xFFFF);
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into_ref!(dma);
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let opts: crate::dma::TransferOptions = TransferOptions {
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half_transfer_ir: true,
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priority: Priority::VeryHigh,
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..Default::default()
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};
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// Safety: we forget the struct before this function returns.
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let rx_src = T::regs().dr().as_ptr() as *mut u16;
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let request = dma.request();
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let ring_buf = unsafe { ReadableRingBuffer::new(dma, request, rx_src, dma_buf, opts) };
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// Don't disable the clock
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mem::forget(self);
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RingBufferedAdc {
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_phantom: PhantomData,
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ring_buf,
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}
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}
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}
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impl<'d, T: Instance> RingBufferedAdc<'d, T> {
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fn is_on() -> bool {
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T::regs().cr2().read().adon()
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}
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fn stop_adc() {
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T::regs().cr2().modify(|reg| {
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reg.set_adon(false);
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});
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}
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fn start_adc() {
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T::regs().cr2().modify(|reg| {
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reg.set_adon(true);
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});
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}
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/// Sets the channel sample time
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///
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/// ## SAFETY:
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/// - ADON == 0 i.e ADC must not be enabled when this is called.
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unsafe fn set_channel_sample_time(ch: u8, sample_time: SampleTime) {
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if ch <= 9 {
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T::regs().smpr2().modify(|reg| reg.set_smp(ch as _, sample_time));
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} else {
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T::regs().smpr1().modify(|reg| reg.set_smp((ch - 10) as _, sample_time));
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}
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}
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fn set_channels_sample_time(&mut self, ch: &[u8], sample_time: SampleTime) {
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let ch_iter = ch.iter();
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for idx in ch_iter {
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unsafe {
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Self::set_channel_sample_time(*idx, sample_time);
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}
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}
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}
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pub fn set_sample_sequence(
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&mut self,
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sequence: Sequence,
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channel: &mut impl AdcChannel<T>,
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sample_time: SampleTime,
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) {
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let was_on = Self::is_on();
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if !was_on {
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Self::start_adc();
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}
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// Check the sequence is long enough
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T::regs().sqr1().modify(|r| {
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let prev: Sequence = r.l().into();
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if prev < sequence {
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let new_l: Sequence = sequence;
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trace!("Setting sequence length from {:?} to {:?}", prev as u8, new_l as u8);
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r.set_l(sequence.into())
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} else {
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r.set_l(prev.into())
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}
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});
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// Set this GPIO as an analog input.
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channel.setup();
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// Set the channel in the right sequence field.
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match sequence {
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Sequence::One => T::regs().sqr3().modify(|w| w.set_sq(0, channel.channel())),
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Sequence::Two => T::regs().sqr3().modify(|w| w.set_sq(1, channel.channel())),
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Sequence::Three => T::regs().sqr3().modify(|w| w.set_sq(2, channel.channel())),
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Sequence::Four => T::regs().sqr3().modify(|w| w.set_sq(3, channel.channel())),
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Sequence::Five => T::regs().sqr3().modify(|w| w.set_sq(4, channel.channel())),
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Sequence::Six => T::regs().sqr3().modify(|w| w.set_sq(5, channel.channel())),
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Sequence::Seven => T::regs().sqr2().modify(|w| w.set_sq(6, channel.channel())),
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Sequence::Eight => T::regs().sqr2().modify(|w| w.set_sq(7, channel.channel())),
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Sequence::Nine => T::regs().sqr2().modify(|w| w.set_sq(8, channel.channel())),
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Sequence::Ten => T::regs().sqr2().modify(|w| w.set_sq(9, channel.channel())),
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Sequence::Eleven => T::regs().sqr2().modify(|w| w.set_sq(10, channel.channel())),
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Sequence::Twelve => T::regs().sqr2().modify(|w| w.set_sq(11, channel.channel())),
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Sequence::Thirteen => T::regs().sqr1().modify(|w| w.set_sq(12, channel.channel())),
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Sequence::Fourteen => T::regs().sqr1().modify(|w| w.set_sq(13, channel.channel())),
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Sequence::Fifteen => T::regs().sqr1().modify(|w| w.set_sq(14, channel.channel())),
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Sequence::Sixteen => T::regs().sqr1().modify(|w| w.set_sq(15, channel.channel())),
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};
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if !was_on {
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Self::stop_adc();
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}
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self.set_channels_sample_time(&[channel.channel()], sample_time);
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Self::start_adc();
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}
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/// Turns on ADC if it is not already turned on and starts continuous DMA transfer.
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pub fn start(&mut self) -> Result<(), OverrunError> {
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self.setup_adc();
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self.ring_buf.clear();
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Ok(())
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}
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fn stop(&mut self, err: OverrunError) -> Result<usize, OverrunError> {
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self.teardown_adc();
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Err(err)
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}
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/// Stops DMA transfer.
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/// It does not turn off ADC.
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/// Calling `start` restarts continuous DMA transfer.
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///
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/// [`start`]: #method.start
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pub fn teardown_adc(&mut self) {
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// Stop the DMA transfer
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self.ring_buf.request_pause();
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let r = T::regs();
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// Stop ADC
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r.cr2().modify(|reg| {
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// Stop ADC
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reg.set_swstart(false);
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// Stop DMA
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reg.set_dma(false);
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});
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r.cr1().modify(|w| {
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// Disable interrupt for end of conversion
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w.set_eocie(false);
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// Disable interrupt for overrun
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w.set_ovrie(false);
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});
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clear_interrupt_flags(r);
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compiler_fence(Ordering::SeqCst);
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}
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fn setup_adc(&mut self) {
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compiler_fence(Ordering::SeqCst);
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self.ring_buf.start();
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let r = T::regs();
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// Enable ADC
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let was_on = Self::is_on();
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if !was_on {
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r.cr2().modify(|reg| {
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reg.set_adon(false);
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reg.set_swstart(false);
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});
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}
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// Clear all interrupts
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r.sr().modify(|regs| {
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regs.set_eoc(false);
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regs.set_ovr(false);
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regs.set_strt(false);
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});
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r.cr1().modify(|w| {
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// Enable interrupt for end of conversion
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w.set_eocie(true);
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// Enable interrupt for overrun
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w.set_ovrie(true);
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// Scanning converisons of multiple channels
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w.set_scan(true);
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// Continuous conversion mode
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w.set_discen(false);
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});
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r.cr2().modify(|w| {
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// Enable DMA mode
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w.set_dma(true);
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// Enable continuous conversions
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w.set_cont(true);
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// DMA requests are issues as long as DMA=1 and data are converted.
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w.set_dds(vals::Dds::CONTINUOUS);
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// EOC flag is set at the end of each conversion.
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w.set_eocs(vals::Eocs::EACHCONVERSION);
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});
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// Begin ADC conversions
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T::regs().cr2().modify(|reg| {
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reg.set_adon(true);
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reg.set_swstart(true);
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});
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super::blocking_delay_us(3);
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}
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/// Read bytes that are readily available in the ring buffer.
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/// If no bytes are currently available in the buffer the call waits until the some
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/// bytes are available (at least one byte and at most half the buffer size)
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///
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/// Background receive is started if `start()` has not been previously called.
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///
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/// Receive in the background is terminated if an error is returned.
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/// It must then manually be started again by calling `start()` or by re-calling `read()`.
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pub fn blocking_read<const N: usize>(&mut self, buf: &mut [u16; N]) -> Result<usize, OverrunError> {
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let r = T::regs();
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// Start background receive if it was not already started
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if !r.cr2().read().dma() {
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self.start()?;
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}
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// Clear overrun flag if set.
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if r.sr().read().ovr() {
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return self.stop(OverrunError);
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}
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loop {
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match self.ring_buf.read(buf) {
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Ok((0, _)) => {}
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Ok((len, _)) => {
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return Ok(len);
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}
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Err(_) => {
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return self.stop(OverrunError);
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}
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}
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}
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}
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/// Reads measurements from the DMA ring buffer.
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///
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/// This method fills the provided `measurements` array with ADC readings from the DMA buffer.
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/// The length of the `measurements` array should be exactly half of the DMA buffer length. Because interrupts are only generated if half or full DMA transfer completes.
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///
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/// Each call to `read` will populate the `measurements` array in the same order as the channels defined with `set_sample_sequence`.
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/// There will be many sequences worth of measurements in this array because it only returns if at least half of the DMA buffer is filled.
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/// For example if 3 channels are sampled `measurements` contain: `[sq0 sq1 sq3 sq0 sq1 sq3 sq0 sq1 sq3 sq0 sq1 sq3..]`.
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///
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/// If an error is returned, it indicates a DMA overrun, and the process must be restarted by calling `start` or `read` again.
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///
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/// By default, the ADC fills the DMA buffer as quickly as possible. To control the sample rate, call `teardown_adc` after each readout, and then start the DMA again at the desired interval.
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/// Note that even if using `teardown_adc` to control the sample rate, with each call to `read`, measurements equivalent to half the size of the DMA buffer are still collected.
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///
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/// Example:
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/// ```rust,ignore
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/// const DMA_BUF_LEN: usize = 120;
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/// let adc_dma_buf = [0u16; DMA_BUF_LEN];
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/// let mut adc: RingBufferedAdc<embassy_stm32::peripherals::ADC1> = adc.into_ring_buffered(p.DMA2_CH0, adc_dma_buf);
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///
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/// adc.set_sample_sequence(Sequence::One, &mut p.PA0, SampleTime::CYCLES112);
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/// adc.set_sample_sequence(Sequence::Two, &mut p.PA1, SampleTime::CYCLES112);
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/// adc.set_sample_sequence(Sequence::Three, &mut p.PA2, SampleTime::CYCLES112);
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///
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/// let mut measurements = [0u16; DMA_BUF_LEN / 2];
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/// loop {
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/// match adc.read(&mut measurements).await {
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/// Ok(_) => {
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/// defmt::info!("adc1: {}", measurements);
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/// // Only needed to manually control sample rate.
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/// adc.teardown_adc();
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/// }
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/// Err(e) => {
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/// defmt::warn!("Error: {:?}", e);
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/// // DMA overrun, next call to `read` restarts ADC.
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/// }
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/// }
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///
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/// // Manually control sample rate.
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/// Timer::after_millis(100).await;
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/// }
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/// ```
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///
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///
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/// [`set_sample_sequence`]: #method.set_sample_sequence
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/// [`teardown_adc`]: #method.teardown_adc
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/// [`start`]: #method.start
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pub async fn read<const N: usize>(&mut self, measurements: &mut [u16; N]) -> Result<usize, OverrunError> {
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assert_eq!(
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self.ring_buf.capacity() / 2,
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N,
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"Buffer size must be half the size of the ring buffer"
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);
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let r = T::regs();
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// Start background receive if it was not already started
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if !r.cr2().read().dma() {
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self.start()?;
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}
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// Clear overrun flag if set.
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if r.sr().read().ovr() {
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return self.stop(OverrunError);
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}
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match self.ring_buf.read_exact(measurements).await {
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Ok(len) => Ok(len),
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Err(_) => self.stop(OverrunError),
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}
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}
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}
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impl<T: Instance> Drop for RingBufferedAdc<'_, T> {
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fn drop(&mut self) {
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self.teardown_adc();
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rcc::disable::<T>();
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}
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}
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