812 lines
32 KiB
Rust
812 lines
32 KiB
Rust
use std::collections::{HashMap, HashSet};
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use std::fmt::Write as _;
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use std::path::PathBuf;
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use std::{env, fs};
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use proc_macro2::TokenStream;
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use quote::{format_ident, quote};
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use stm32_metapac::metadata::METADATA;
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fn main() {
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let chip_name = match env::vars()
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.map(|(a, _)| a)
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.filter(|x| x.starts_with("CARGO_FEATURE_STM32"))
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.get_one()
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{
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Ok(x) => x,
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Err(GetOneError::None) => panic!("No stm32xx Cargo feature enabled"),
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Err(GetOneError::Multiple) => panic!("Multiple stm32xx Cargo features enabled"),
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}
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.strip_prefix("CARGO_FEATURE_")
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.unwrap()
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.to_ascii_lowercase();
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for p in METADATA.peripherals {
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if let Some(r) = &p.registers {
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println!("cargo:rustc-cfg={}", r.kind);
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println!("cargo:rustc-cfg={}_{}", r.kind, r.version);
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}
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}
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// ========
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// Generate singletons
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let mut singletons: Vec<String> = Vec::new();
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for p in METADATA.peripherals {
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if let Some(r) = &p.registers {
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match r.kind {
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// Generate singletons per pin, not per port
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"gpio" => {
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println!("{}", p.name);
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let port_letter = p.name.strip_prefix("GPIO").unwrap();
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for pin_num in 0..16 {
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singletons.push(format!("P{}{}", port_letter, pin_num));
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}
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}
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// No singleton for these, the HAL handles them specially.
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"exti" => {}
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// We *shouldn't* have singletons for these, but the HAL currently requires
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// singletons, for using with RccPeripheral to enable/disable clocks to them.
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"rcc" => {
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if r.version.starts_with("h7") {
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singletons.push("MCO1".to_string());
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singletons.push("MCO2".to_string());
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}
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singletons.push(p.name.to_string());
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}
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//"dbgmcu" => {}
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//"syscfg" => {}
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//"dma" => {}
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//"bdma" => {}
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//"dmamux" => {}
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// For other peripherals, one singleton per peri
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_ => singletons.push(p.name.to_string()),
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}
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}
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}
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// One singleton per EXTI line
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for pin_num in 0..16 {
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singletons.push(format!("EXTI{}", pin_num));
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}
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// One singleton per DMA channel
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for c in METADATA.dma_channels {
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singletons.push(c.name.to_string());
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}
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let mut g = TokenStream::new();
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let singleton_tokens: Vec<_> = singletons.iter().map(|s| format_ident!("{}", s)).collect();
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g.extend(quote! {
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embassy_hal_common::peripherals!(#(#singleton_tokens),*);
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});
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// ========
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// Generate interrupt declarations
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let mut irqs = Vec::new();
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for irq in METADATA.interrupts {
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irqs.push(format_ident!("{}", irq.name));
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}
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g.extend(quote! {
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pub mod interrupt {
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use crate::pac::Interrupt as InterruptEnum;
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use embassy_macros::cortex_m_interrupt_declare as declare;
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#(
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declare!(#irqs);
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)*
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}
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});
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// ========
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// Generate DMA IRQs.
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let mut dma_irqs: HashMap<&str, Vec<(&str, &str)>> = HashMap::new();
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for p in METADATA.peripherals {
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if let Some(r) = &p.registers {
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if r.kind == "dma" || r.kind == "bdma" || r.kind == "gpdma" {
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if p.name == "BDMA1" {
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// BDMA1 in H7 doesn't use DMAMUX, which breaks
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continue;
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}
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for irq in p.interrupts {
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dma_irqs.entry(irq.interrupt).or_default().push((p.name, irq.signal));
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}
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}
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}
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}
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for (irq, channels) in dma_irqs {
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let irq = format_ident!("{}", irq);
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let channels = channels.iter().map(|(dma, ch)| format_ident!("{}_{}", dma, ch));
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g.extend(quote! {
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#[crate::interrupt]
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unsafe fn #irq () {
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#(
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<crate::peripherals::#channels as crate::dma::sealed::Channel>::on_irq();
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)*
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}
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});
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}
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// ========
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// Generate RccPeripheral impls
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for p in METADATA.peripherals {
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// generating RccPeripheral impl for H7 ADC3 would result in bad frequency
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if !singletons.contains(&p.name.to_string()) || (p.name == "ADC3" && METADATA.line.starts_with("STM32H7")) {
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continue;
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}
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if let Some(rcc) = &p.rcc {
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let en = rcc.enable.as_ref().unwrap();
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let rst = match &rcc.reset {
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Some(rst) => {
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let rst_reg = format_ident!("{}", rst.register.to_ascii_lowercase());
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let set_rst_field = format_ident!("set_{}", rst.field.to_ascii_lowercase());
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quote! {
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critical_section::with(|_| unsafe {
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crate::pac::RCC.#rst_reg().modify(|w| w.#set_rst_field(true));
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crate::pac::RCC.#rst_reg().modify(|w| w.#set_rst_field(false));
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});
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}
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}
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None => TokenStream::new(),
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};
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let after_enable = if chip_name.starts_with("stm32f2") {
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// Errata: ES0005 - 2.1.11 Delay after an RCC peripheral clock enabling
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quote! {
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cortex_m::asm::dsb();
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}
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} else {
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TokenStream::new()
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};
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let pname = format_ident!("{}", p.name);
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let clk = format_ident!("{}", rcc.clock.to_ascii_lowercase());
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let en_reg = format_ident!("{}", en.register.to_ascii_lowercase());
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let set_en_field = format_ident!("set_{}", en.field.to_ascii_lowercase());
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g.extend(quote! {
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impl crate::rcc::sealed::RccPeripheral for peripherals::#pname {
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fn frequency() -> crate::time::Hertz {
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critical_section::with(|_| unsafe {
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crate::rcc::get_freqs().#clk
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})
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}
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fn enable() {
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critical_section::with(|_| unsafe {
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crate::pac::RCC.#en_reg().modify(|w| w.#set_en_field(true));
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#after_enable
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})
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}
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fn disable() {
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critical_section::with(|_| unsafe {
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crate::pac::RCC.#en_reg().modify(|w| w.#set_en_field(false));
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})
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}
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fn reset() {
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#rst
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}
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}
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impl crate::rcc::RccPeripheral for peripherals::#pname {}
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});
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}
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}
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// ========
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// Generate fns to enable GPIO, DMA in RCC
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for kind in ["dma", "bdma", "dmamux", "gpdma", "gpio"] {
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let mut gg = TokenStream::new();
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for p in METADATA.peripherals {
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if p.registers.is_some() && p.registers.as_ref().unwrap().kind == kind {
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if let Some(rcc) = &p.rcc {
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let en = rcc.enable.as_ref().unwrap();
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let en_reg = format_ident!("{}", en.register.to_ascii_lowercase());
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let set_en_field = format_ident!("set_{}", en.field.to_ascii_lowercase());
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gg.extend(quote! {
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crate::pac::RCC.#en_reg().modify(|w| w.#set_en_field(true));
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})
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}
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}
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}
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let fname = format_ident!("init_{}", kind);
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g.extend(quote! {
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pub unsafe fn #fname(){
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#gg
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}
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})
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}
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// ========
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// Generate pin_trait_impl!
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#[rustfmt::skip]
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let signals: HashMap<_, _> = [
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// (kind, signal) => trait
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(("usart", "TX"), quote!(crate::usart::TxPin)),
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(("usart", "RX"), quote!(crate::usart::RxPin)),
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(("usart", "CTS"), quote!(crate::usart::CtsPin)),
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(("usart", "RTS"), quote!(crate::usart::RtsPin)),
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(("usart", "CK"), quote!(crate::usart::CkPin)),
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(("usart", "TX"), quote!(crate::usart::TxPin)),
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(("usart", "RX"), quote!(crate::usart::RxPin)),
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(("usart", "CTS"), quote!(crate::usart::CtsPin)),
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(("usart", "RTS"), quote!(crate::usart::RtsPin)),
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(("usart", "CK"), quote!(crate::usart::CkPin)),
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(("spi", "SCK"), quote!(crate::spi::SckPin)),
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(("spi", "MOSI"), quote!(crate::spi::MosiPin)),
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(("spi", "MISO"), quote!(crate::spi::MisoPin)),
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(("i2c", "SDA"), quote!(crate::i2c::SdaPin)),
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(("i2c", "SCL"), quote!(crate::i2c::SclPin)),
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(("rcc", "MCO_1"), quote!(crate::rcc::McoPin)),
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(("rcc", "MCO_2"), quote!(crate::rcc::McoPin)),
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(("dcmi", "D0"), quote!(crate::dcmi::D0Pin)),
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(("dcmi", "D1"), quote!(crate::dcmi::D1Pin)),
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(("dcmi", "D2"), quote!(crate::dcmi::D2Pin)),
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(("dcmi", "D3"), quote!(crate::dcmi::D3Pin)),
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(("dcmi", "D4"), quote!(crate::dcmi::D4Pin)),
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(("dcmi", "D5"), quote!(crate::dcmi::D5Pin)),
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(("dcmi", "D6"), quote!(crate::dcmi::D6Pin)),
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(("dcmi", "D7"), quote!(crate::dcmi::D7Pin)),
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(("dcmi", "D8"), quote!(crate::dcmi::D8Pin)),
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(("dcmi", "D9"), quote!(crate::dcmi::D9Pin)),
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(("dcmi", "D10"), quote!(crate::dcmi::D10Pin)),
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(("dcmi", "D11"), quote!(crate::dcmi::D11Pin)),
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(("dcmi", "D12"), quote!(crate::dcmi::D12Pin)),
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(("dcmi", "D13"), quote!(crate::dcmi::D13Pin)),
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(("dcmi", "HSYNC"), quote!(crate::dcmi::HSyncPin)),
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(("dcmi", "VSYNC"), quote!(crate::dcmi::VSyncPin)),
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(("dcmi", "PIXCLK"), quote!(crate::dcmi::PixClkPin)),
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(("usb", "DP"), quote!(crate::usb::DpPin)),
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(("usb", "DM"), quote!(crate::usb::DmPin)),
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(("otgfs", "DP"), quote!(crate::usb_otg::DpPin)),
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(("otgfs", "DM"), quote!(crate::usb_otg::DmPin)),
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(("otghs", "DP"), quote!(crate::usb_otg::DpPin)),
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(("otghs", "DM"), quote!(crate::usb_otg::DmPin)),
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(("otghs", "ULPI_CK"), quote!(crate::usb_otg::UlpiClkPin)),
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(("otghs", "ULPI_DIR"), quote!(crate::usb_otg::UlpiDirPin)),
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(("otghs", "ULPI_NXT"), quote!(crate::usb_otg::UlpiNxtPin)),
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(("otghs", "ULPI_STP"), quote!(crate::usb_otg::UlpiStpPin)),
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(("otghs", "ULPI_D0"), quote!(crate::usb_otg::UlpiD0Pin)),
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(("otghs", "ULPI_D1"), quote!(crate::usb_otg::UlpiD1Pin)),
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(("otghs", "ULPI_D2"), quote!(crate::usb_otg::UlpiD2Pin)),
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(("otghs", "ULPI_D3"), quote!(crate::usb_otg::UlpiD3Pin)),
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(("otghs", "ULPI_D4"), quote!(crate::usb_otg::UlpiD4Pin)),
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(("otghs", "ULPI_D5"), quote!(crate::usb_otg::UlpiD5Pin)),
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(("otghs", "ULPI_D6"), quote!(crate::usb_otg::UlpiD6Pin)),
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(("otghs", "ULPI_D7"), quote!(crate::usb_otg::UlpiD7Pin)),
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(("can", "TX"), quote!(crate::can::TxPin)),
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(("can", "RX"), quote!(crate::can::RxPin)),
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(("eth", "REF_CLK"), quote!(crate::eth::RefClkPin)),
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(("eth", "MDIO"), quote!(crate::eth::MDIOPin)),
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(("eth", "MDC"), quote!(crate::eth::MDCPin)),
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(("eth", "CRS_DV"), quote!(crate::eth::CRSPin)),
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(("eth", "RXD0"), quote!(crate::eth::RXD0Pin)),
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(("eth", "RXD1"), quote!(crate::eth::RXD1Pin)),
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(("eth", "TXD0"), quote!(crate::eth::TXD0Pin)),
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(("eth", "TXD1"), quote!(crate::eth::TXD1Pin)),
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(("eth", "TX_EN"), quote!(crate::eth::TXEnPin)),
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(("fmc", "A0"), quote!(crate::fmc::A0Pin)),
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(("fmc", "A1"), quote!(crate::fmc::A1Pin)),
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(("fmc", "A2"), quote!(crate::fmc::A2Pin)),
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(("fmc", "A3"), quote!(crate::fmc::A3Pin)),
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(("fmc", "A4"), quote!(crate::fmc::A4Pin)),
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(("fmc", "A5"), quote!(crate::fmc::A5Pin)),
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(("fmc", "A6"), quote!(crate::fmc::A6Pin)),
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(("fmc", "A7"), quote!(crate::fmc::A7Pin)),
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(("fmc", "A8"), quote!(crate::fmc::A8Pin)),
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(("fmc", "A9"), quote!(crate::fmc::A9Pin)),
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(("fmc", "A10"), quote!(crate::fmc::A10Pin)),
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(("fmc", "A11"), quote!(crate::fmc::A11Pin)),
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(("fmc", "A12"), quote!(crate::fmc::A12Pin)),
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(("fmc", "A13"), quote!(crate::fmc::A13Pin)),
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(("fmc", "A14"), quote!(crate::fmc::A14Pin)),
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(("fmc", "A15"), quote!(crate::fmc::A15Pin)),
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(("fmc", "A16"), quote!(crate::fmc::A16Pin)),
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(("fmc", "A17"), quote!(crate::fmc::A17Pin)),
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(("fmc", "A18"), quote!(crate::fmc::A18Pin)),
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(("fmc", "A19"), quote!(crate::fmc::A19Pin)),
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(("fmc", "A20"), quote!(crate::fmc::A20Pin)),
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(("fmc", "A21"), quote!(crate::fmc::A21Pin)),
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(("fmc", "A22"), quote!(crate::fmc::A22Pin)),
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(("fmc", "A23"), quote!(crate::fmc::A23Pin)),
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(("fmc", "A24"), quote!(crate::fmc::A24Pin)),
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(("fmc", "A25"), quote!(crate::fmc::A25Pin)),
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(("fmc", "D0"), quote!(crate::fmc::D0Pin)),
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(("fmc", "D1"), quote!(crate::fmc::D1Pin)),
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(("fmc", "D2"), quote!(crate::fmc::D2Pin)),
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(("fmc", "D3"), quote!(crate::fmc::D3Pin)),
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(("fmc", "D4"), quote!(crate::fmc::D4Pin)),
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(("fmc", "D5"), quote!(crate::fmc::D5Pin)),
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(("fmc", "D6"), quote!(crate::fmc::D6Pin)),
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(("fmc", "D7"), quote!(crate::fmc::D7Pin)),
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(("fmc", "D8"), quote!(crate::fmc::D8Pin)),
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(("fmc", "D9"), quote!(crate::fmc::D9Pin)),
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(("fmc", "D10"), quote!(crate::fmc::D10Pin)),
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(("fmc", "D11"), quote!(crate::fmc::D11Pin)),
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(("fmc", "D12"), quote!(crate::fmc::D12Pin)),
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(("fmc", "D13"), quote!(crate::fmc::D13Pin)),
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(("fmc", "D14"), quote!(crate::fmc::D14Pin)),
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(("fmc", "D15"), quote!(crate::fmc::D15Pin)),
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(("fmc", "D16"), quote!(crate::fmc::D16Pin)),
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(("fmc", "D17"), quote!(crate::fmc::D17Pin)),
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(("fmc", "D18"), quote!(crate::fmc::D18Pin)),
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(("fmc", "D19"), quote!(crate::fmc::D19Pin)),
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(("fmc", "D20"), quote!(crate::fmc::D20Pin)),
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(("fmc", "D21"), quote!(crate::fmc::D21Pin)),
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(("fmc", "D22"), quote!(crate::fmc::D22Pin)),
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(("fmc", "D23"), quote!(crate::fmc::D23Pin)),
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(("fmc", "D24"), quote!(crate::fmc::D24Pin)),
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(("fmc", "D25"), quote!(crate::fmc::D25Pin)),
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(("fmc", "D26"), quote!(crate::fmc::D26Pin)),
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(("fmc", "D27"), quote!(crate::fmc::D27Pin)),
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(("fmc", "D28"), quote!(crate::fmc::D28Pin)),
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(("fmc", "D29"), quote!(crate::fmc::D29Pin)),
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(("fmc", "D30"), quote!(crate::fmc::D30Pin)),
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(("fmc", "D31"), quote!(crate::fmc::D31Pin)),
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(("fmc", "DA0"), quote!(crate::fmc::DA0Pin)),
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(("fmc", "DA1"), quote!(crate::fmc::DA1Pin)),
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(("fmc", "DA2"), quote!(crate::fmc::DA2Pin)),
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(("fmc", "DA3"), quote!(crate::fmc::DA3Pin)),
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(("fmc", "DA4"), quote!(crate::fmc::DA4Pin)),
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(("fmc", "DA5"), quote!(crate::fmc::DA5Pin)),
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(("fmc", "DA6"), quote!(crate::fmc::DA6Pin)),
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(("fmc", "DA7"), quote!(crate::fmc::DA7Pin)),
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(("fmc", "DA8"), quote!(crate::fmc::DA8Pin)),
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(("fmc", "DA9"), quote!(crate::fmc::DA9Pin)),
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(("fmc", "DA10"), quote!(crate::fmc::DA10Pin)),
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(("fmc", "DA11"), quote!(crate::fmc::DA11Pin)),
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(("fmc", "DA12"), quote!(crate::fmc::DA12Pin)),
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(("fmc", "DA13"), quote!(crate::fmc::DA13Pin)),
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(("fmc", "DA14"), quote!(crate::fmc::DA14Pin)),
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(("fmc", "DA15"), quote!(crate::fmc::DA15Pin)),
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(("fmc", "SDNWE"), quote!(crate::fmc::SDNWEPin)),
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(("fmc", "SDNCAS"), quote!(crate::fmc::SDNCASPin)),
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(("fmc", "SDNRAS"), quote!(crate::fmc::SDNRASPin)),
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(("fmc", "SDNE0"), quote!(crate::fmc::SDNE0Pin)),
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(("fmc", "SDNE1"), quote!(crate::fmc::SDNE1Pin)),
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(("fmc", "SDCKE0"), quote!(crate::fmc::SDCKE0Pin)),
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(("fmc", "SDCKE1"), quote!(crate::fmc::SDCKE1Pin)),
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(("fmc", "SDCLK"), quote!(crate::fmc::SDCLKPin)),
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(("fmc", "NBL0"), quote!(crate::fmc::NBL0Pin)),
|
|
(("fmc", "NBL1"), quote!(crate::fmc::NBL1Pin)),
|
|
(("fmc", "NBL2"), quote!(crate::fmc::NBL2Pin)),
|
|
(("fmc", "NBL3"), quote!(crate::fmc::NBL3Pin)),
|
|
(("fmc", "INT"), quote!(crate::fmc::INTPin)),
|
|
(("fmc", "NL"), quote!(crate::fmc::NLPin)),
|
|
(("fmc", "NWAIT"), quote!(crate::fmc::NWaitPin)),
|
|
(("fmc", "NE1"), quote!(crate::fmc::NE1Pin)),
|
|
(("fmc", "NE2"), quote!(crate::fmc::NE2Pin)),
|
|
(("fmc", "NE3"), quote!(crate::fmc::NE3Pin)),
|
|
(("fmc", "NE4"), quote!(crate::fmc::NE4Pin)),
|
|
(("fmc", "NCE"), quote!(crate::fmc::NCEPin)),
|
|
(("fmc", "NOE"), quote!(crate::fmc::NOEPin)),
|
|
(("fmc", "NWE"), quote!(crate::fmc::NWEPin)),
|
|
(("fmc", "Clk"), quote!(crate::fmc::ClkPin)),
|
|
(("fmc", "BA0"), quote!(crate::fmc::BA0Pin)),
|
|
(("fmc", "BA1"), quote!(crate::fmc::BA1Pin)),
|
|
(("timer", "CH1"), quote!(crate::pwm::Channel1Pin)),
|
|
(("timer", "CH1N"), quote!(crate::pwm::Channel1ComplementaryPin)),
|
|
(("timer", "CH2"), quote!(crate::pwm::Channel2Pin)),
|
|
(("timer", "CH2N"), quote!(crate::pwm::Channel2ComplementaryPin)),
|
|
(("timer", "CH3"), quote!(crate::pwm::Channel3Pin)),
|
|
(("timer", "CH3N"), quote!(crate::pwm::Channel3ComplementaryPin)),
|
|
(("timer", "CH4"), quote!(crate::pwm::Channel4Pin)),
|
|
(("timer", "CH4N"), quote!(crate::pwm::Channel4ComplementaryPin)),
|
|
(("timer", "ETR"), quote!(crate::pwm::ExternalTriggerPin)),
|
|
(("timer", "BKIN"), quote!(crate::pwm::BreakInputPin)),
|
|
(("timer", "BKIN_COMP1"), quote!(crate::pwm::BreakInputComparator1Pin)),
|
|
(("timer", "BKIN_COMP2"), quote!(crate::pwm::BreakInputComparator2Pin)),
|
|
(("timer", "BKIN2"), quote!(crate::pwm::BreakInput2Pin)),
|
|
(("timer", "BKIN2_COMP1"), quote!(crate::pwm::BreakInput2Comparator1Pin)),
|
|
(("timer", "BKIN2_COMP2"), quote!(crate::pwm::BreakInput2Comparator2Pin)),
|
|
(("sdmmc", "CK"), quote!(crate::sdmmc::CkPin)),
|
|
(("sdmmc", "CMD"), quote!(crate::sdmmc::CmdPin)),
|
|
(("sdmmc", "D0"), quote!(crate::sdmmc::D0Pin)),
|
|
(("sdmmc", "D1"), quote!(crate::sdmmc::D1Pin)),
|
|
(("sdmmc", "D2"), quote!(crate::sdmmc::D2Pin)),
|
|
(("sdmmc", "D3"), quote!(crate::sdmmc::D3Pin)),
|
|
(("sdmmc", "D4"), quote!(crate::sdmmc::D4Pin)),
|
|
(("sdmmc", "D5"), quote!(crate::sdmmc::D5Pin)),
|
|
(("sdmmc", "D6"), quote!(crate::sdmmc::D6Pin)),
|
|
(("sdmmc", "D6"), quote!(crate::sdmmc::D7Pin)),
|
|
(("sdmmc", "D8"), quote!(crate::sdmmc::D8Pin)),
|
|
].into();
|
|
|
|
for p in METADATA.peripherals {
|
|
if let Some(regs) = &p.registers {
|
|
for pin in p.pins {
|
|
let key = (regs.kind, pin.signal);
|
|
if let Some(tr) = signals.get(&key) {
|
|
let mut peri = format_ident!("{}", p.name);
|
|
let pin_name = format_ident!("{}", pin.pin);
|
|
let af = pin.af.unwrap_or(0);
|
|
|
|
// MCO is special
|
|
if pin.signal.starts_with("MCO_") {
|
|
// Supported in H7 only for now
|
|
if regs.version.starts_with("h7") {
|
|
peri = format_ident!("{}", pin.signal.replace("_", ""));
|
|
} else {
|
|
continue;
|
|
}
|
|
}
|
|
|
|
g.extend(quote! {
|
|
pin_trait_impl!(#tr, #peri, #pin_name, #af);
|
|
})
|
|
}
|
|
|
|
// ADC is special
|
|
if regs.kind == "adc" {
|
|
let peri = format_ident!("{}", p.name);
|
|
let pin_name = format_ident!("{}", pin.pin);
|
|
|
|
// H7 has differential voltage measurements
|
|
let ch: Option<u8> = if pin.signal.starts_with("INP") {
|
|
Some(pin.signal.strip_prefix("INP").unwrap().parse().unwrap())
|
|
} else if pin.signal.starts_with("INN") {
|
|
// TODO handle in the future when embassy supports differential measurements
|
|
None
|
|
} else if pin.signal.starts_with("IN") {
|
|
Some(pin.signal.strip_prefix("IN").unwrap().parse().unwrap())
|
|
} else {
|
|
None
|
|
};
|
|
if let Some(ch) = ch {
|
|
g.extend(quote! {
|
|
impl_adc_pin!( #peri, #pin_name, #ch);
|
|
})
|
|
}
|
|
}
|
|
|
|
// DAC is special
|
|
if regs.kind == "dac" {
|
|
let peri = format_ident!("{}", p.name);
|
|
let pin_name = format_ident!("{}", pin.pin);
|
|
let ch: u8 = pin.signal.strip_prefix("OUT").unwrap().parse().unwrap();
|
|
|
|
g.extend(quote! {
|
|
impl_dac_pin!( #peri, #pin_name, #ch);
|
|
})
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
// ========
|
|
// Generate dma_trait_impl!
|
|
|
|
let signals: HashMap<_, _> = [
|
|
// (kind, signal) => trait
|
|
(("usart", "RX"), quote!(crate::usart::RxDma)),
|
|
(("usart", "TX"), quote!(crate::usart::TxDma)),
|
|
(("spi", "RX"), quote!(crate::spi::RxDma)),
|
|
(("spi", "TX"), quote!(crate::spi::TxDma)),
|
|
(("i2c", "RX"), quote!(crate::i2c::RxDma)),
|
|
(("i2c", "TX"), quote!(crate::i2c::TxDma)),
|
|
(("dcmi", "DCMI"), quote!(crate::dcmi::FrameDma)),
|
|
(("dcmi", "PSSI"), quote!(crate::dcmi::FrameDma)),
|
|
// SDMMCv1 uses the same channel for both directions, so just implement for RX
|
|
(("sdmmc", "RX"), quote!(crate::sdmmc::SdmmcDma)),
|
|
]
|
|
.into();
|
|
|
|
for p in METADATA.peripherals {
|
|
if let Some(regs) = &p.registers {
|
|
let mut dupe = HashSet::new();
|
|
for ch in p.dma_channels {
|
|
// Some chips have multiple request numbers for the same (peri, signal, channel) combos.
|
|
// Ignore the dupes, picking the first one. Otherwise this causes conflicting trait impls
|
|
let key = (ch.signal, ch.channel);
|
|
if !dupe.insert(key) {
|
|
continue;
|
|
}
|
|
|
|
if let Some(tr) = signals.get(&(regs.kind, ch.signal)) {
|
|
let peri = format_ident!("{}", p.name);
|
|
|
|
let channel = if let Some(channel) = &ch.channel {
|
|
// Chip with DMA/BDMA, without DMAMUX
|
|
let channel = format_ident!("{}", channel);
|
|
quote!({channel: #channel})
|
|
} else if let Some(dmamux) = &ch.dmamux {
|
|
// Chip with DMAMUX
|
|
let dmamux = format_ident!("{}", dmamux);
|
|
quote!({dmamux: #dmamux})
|
|
} else if let Some(dma) = &ch.dma {
|
|
// Chip with GPDMA
|
|
let dma = format_ident!("{}", dma);
|
|
quote!({dma: #dma})
|
|
} else {
|
|
unreachable!();
|
|
};
|
|
|
|
let request = if let Some(request) = ch.request {
|
|
let request = request as u8;
|
|
quote!(#request)
|
|
} else {
|
|
quote!(())
|
|
};
|
|
|
|
g.extend(quote! {
|
|
dma_trait_impl!(#tr, #peri, #channel, #request);
|
|
});
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
// ========
|
|
// Write foreach_foo! macrotables
|
|
|
|
let mut interrupts_table: Vec<Vec<String>> = Vec::new();
|
|
let mut peripherals_table: Vec<Vec<String>> = Vec::new();
|
|
let mut pins_table: Vec<Vec<String>> = Vec::new();
|
|
let mut dma_channels_table: Vec<Vec<String>> = Vec::new();
|
|
|
|
let gpio_base = METADATA.peripherals.iter().find(|p| p.name == "GPIOA").unwrap().address as u32;
|
|
let gpio_stride = 0x400;
|
|
|
|
for p in METADATA.peripherals {
|
|
if let Some(regs) = &p.registers {
|
|
if regs.kind == "gpio" {
|
|
let port_letter = p.name.chars().skip(4).next().unwrap();
|
|
assert_eq!(0, (p.address as u32 - gpio_base) % gpio_stride);
|
|
let port_num = (p.address as u32 - gpio_base) / gpio_stride;
|
|
|
|
for pin_num in 0u32..16 {
|
|
let pin_name = format!("P{}{}", port_letter, pin_num);
|
|
pins_table.push(vec![
|
|
pin_name,
|
|
p.name.to_string(),
|
|
port_num.to_string(),
|
|
pin_num.to_string(),
|
|
format!("EXTI{}", pin_num),
|
|
]);
|
|
}
|
|
}
|
|
|
|
for irq in p.interrupts {
|
|
let mut row = Vec::new();
|
|
row.push(p.name.to_string());
|
|
row.push(regs.kind.to_string());
|
|
row.push(regs.block.to_string());
|
|
row.push(irq.signal.to_string());
|
|
row.push(irq.interrupt.to_ascii_uppercase());
|
|
interrupts_table.push(row)
|
|
}
|
|
|
|
let mut row = Vec::new();
|
|
row.push(regs.kind.to_string());
|
|
row.push(p.name.to_string());
|
|
peripherals_table.push(row);
|
|
}
|
|
}
|
|
|
|
let mut dma_channel_count: usize = 0;
|
|
let mut bdma_channel_count: usize = 0;
|
|
let mut gpdma_channel_count: usize = 0;
|
|
|
|
for ch in METADATA.dma_channels {
|
|
let mut row = Vec::new();
|
|
let dma_peri = METADATA.peripherals.iter().find(|p| p.name == ch.dma).unwrap();
|
|
let bi = dma_peri.registers.as_ref().unwrap();
|
|
|
|
let num;
|
|
match bi.kind {
|
|
"dma" => {
|
|
num = dma_channel_count;
|
|
dma_channel_count += 1;
|
|
}
|
|
"bdma" => {
|
|
num = bdma_channel_count;
|
|
bdma_channel_count += 1;
|
|
}
|
|
"gpdma" => {
|
|
num = gpdma_channel_count;
|
|
gpdma_channel_count += 1;
|
|
}
|
|
_ => panic!("bad dma channel kind {}", bi.kind),
|
|
}
|
|
|
|
row.push(ch.name.to_string());
|
|
row.push(ch.dma.to_string());
|
|
row.push(bi.kind.to_string());
|
|
row.push(ch.channel.to_string());
|
|
row.push(num.to_string());
|
|
if let Some(dmamux) = &ch.dmamux {
|
|
let dmamux_channel = ch.dmamux_channel.unwrap();
|
|
row.push(format!("{{dmamux: {}, dmamux_channel: {}}}", dmamux, dmamux_channel));
|
|
} else {
|
|
row.push("{}".to_string());
|
|
}
|
|
|
|
dma_channels_table.push(row);
|
|
}
|
|
|
|
g.extend(quote! {
|
|
pub(crate) const DMA_CHANNEL_COUNT: usize = #dma_channel_count;
|
|
pub(crate) const BDMA_CHANNEL_COUNT: usize = #bdma_channel_count;
|
|
pub(crate) const GPDMA_CHANNEL_COUNT: usize = #gpdma_channel_count;
|
|
});
|
|
|
|
for irq in METADATA.interrupts {
|
|
let name = irq.name.to_ascii_uppercase();
|
|
interrupts_table.push(vec![name.clone()]);
|
|
if name.contains("EXTI") {
|
|
interrupts_table.push(vec!["EXTI".to_string(), name.clone()]);
|
|
}
|
|
}
|
|
|
|
let mut m = String::new();
|
|
|
|
make_table(&mut m, "foreach_interrupt", &interrupts_table);
|
|
make_table(&mut m, "foreach_peripheral", &peripherals_table);
|
|
make_table(&mut m, "foreach_pin", &pins_table);
|
|
make_table(&mut m, "foreach_dma_channel", &dma_channels_table);
|
|
|
|
let out_dir = &PathBuf::from(env::var_os("OUT_DIR").unwrap());
|
|
let out_file = out_dir.join("_macros.rs").to_string_lossy().to_string();
|
|
fs::write(out_file, m).unwrap();
|
|
|
|
// ========
|
|
// Write generated.rs
|
|
|
|
let out_file = out_dir.join("_generated.rs").to_string_lossy().to_string();
|
|
fs::write(out_file, g.to_string()).unwrap();
|
|
|
|
// ========
|
|
// Multicore
|
|
|
|
let mut s = chip_name.split('_');
|
|
let mut chip_name: String = s.next().unwrap().to_string();
|
|
let core_name = if let Some(c) = s.next() {
|
|
if !c.starts_with("CM") {
|
|
chip_name.push('_');
|
|
chip_name.push_str(c);
|
|
None
|
|
} else {
|
|
Some(c)
|
|
}
|
|
} else {
|
|
None
|
|
};
|
|
|
|
if let Some(core) = core_name {
|
|
println!("cargo:rustc-cfg={}_{}", &chip_name[..chip_name.len() - 2], core);
|
|
} else {
|
|
println!("cargo:rustc-cfg={}", &chip_name[..chip_name.len() - 2]);
|
|
}
|
|
|
|
// ========
|
|
// stm32f3 wildcard features used in RCC
|
|
|
|
if chip_name.starts_with("stm32f3") {
|
|
println!("cargo:rustc-cfg={}x{}", &chip_name[..9], &chip_name[10..11]);
|
|
}
|
|
|
|
// =======
|
|
// Features for targeting groups of chips
|
|
|
|
println!("cargo:rustc-cfg={}", &chip_name[..7]); // stm32f4
|
|
println!("cargo:rustc-cfg={}", &chip_name[..9]); // stm32f429
|
|
println!("cargo:rustc-cfg={}x", &chip_name[..8]); // stm32f42x
|
|
println!("cargo:rustc-cfg={}x{}", &chip_name[..7], &chip_name[8..9]); // stm32f4x9
|
|
|
|
// ========
|
|
// Handle time-driver-XXXX features.
|
|
|
|
let time_driver = match env::vars()
|
|
.map(|(a, _)| a)
|
|
.filter(|x| x.starts_with("CARGO_FEATURE_TIME_DRIVER_"))
|
|
.get_one()
|
|
{
|
|
Ok(x) => Some(
|
|
x.strip_prefix("CARGO_FEATURE_TIME_DRIVER_")
|
|
.unwrap()
|
|
.to_ascii_lowercase(),
|
|
),
|
|
Err(GetOneError::None) => None,
|
|
Err(GetOneError::Multiple) => panic!("Multiple stm32xx Cargo features enabled"),
|
|
};
|
|
|
|
match time_driver.as_ref().map(|x| x.as_ref()) {
|
|
None => {}
|
|
Some("tim2") => println!("cargo:rustc-cfg=time_driver_tim2"),
|
|
Some("tim3") => println!("cargo:rustc-cfg=time_driver_tim3"),
|
|
Some("tim4") => println!("cargo:rustc-cfg=time_driver_tim4"),
|
|
Some("tim5") => println!("cargo:rustc-cfg=time_driver_tim5"),
|
|
Some("tim12") => println!("cargo:rustc-cfg=time_driver_tim12"),
|
|
Some("tim15") => println!("cargo:rustc-cfg=time_driver_tim15"),
|
|
Some("any") => {
|
|
if singletons.contains(&"TIM2".to_string()) {
|
|
println!("cargo:rustc-cfg=time_driver_tim2");
|
|
} else if singletons.contains(&"TIM3".to_string()) {
|
|
println!("cargo:rustc-cfg=time_driver_tim3");
|
|
} else if singletons.contains(&"TIM4".to_string()) {
|
|
println!("cargo:rustc-cfg=time_driver_tim4");
|
|
} else if singletons.contains(&"TIM5".to_string()) {
|
|
println!("cargo:rustc-cfg=time_driver_tim5");
|
|
} else if singletons.contains(&"TIM12".to_string()) {
|
|
println!("cargo:rustc-cfg=time_driver_tim12");
|
|
} else if singletons.contains(&"TIM15".to_string()) {
|
|
println!("cargo:rustc-cfg=time_driver_tim15");
|
|
} else {
|
|
panic!("time-driver-any requested, but the chip doesn't have TIM2, TIM3, TIM4, TIM5, TIM12 or TIM15.")
|
|
}
|
|
}
|
|
_ => panic!("unknown time_driver {:?}", time_driver),
|
|
}
|
|
|
|
// Handle time-driver-XXXX features.
|
|
if env::var("CARGO_FEATURE_TIME_DRIVER_ANY").is_ok() {}
|
|
println!("cargo:rustc-cfg={}", &chip_name[..chip_name.len() - 2]);
|
|
|
|
println!("cargo:rerun-if-changed=build.rs");
|
|
}
|
|
|
|
enum GetOneError {
|
|
None,
|
|
Multiple,
|
|
}
|
|
|
|
trait IteratorExt: Iterator {
|
|
fn get_one(self) -> Result<Self::Item, GetOneError>;
|
|
}
|
|
|
|
impl<T: Iterator> IteratorExt for T {
|
|
fn get_one(mut self) -> Result<Self::Item, GetOneError> {
|
|
match self.next() {
|
|
None => Err(GetOneError::None),
|
|
Some(res) => match self.next() {
|
|
Some(_) => Err(GetOneError::Multiple),
|
|
None => Ok(res),
|
|
},
|
|
}
|
|
}
|
|
}
|
|
|
|
fn make_table(out: &mut String, name: &str, data: &Vec<Vec<String>>) {
|
|
write!(
|
|
out,
|
|
"#[allow(unused)]
|
|
macro_rules! {} {{
|
|
($($pat:tt => $code:tt;)*) => {{
|
|
macro_rules! __{}_inner {{
|
|
$(($pat) => $code;)*
|
|
($_:tt) => {{}}
|
|
}}
|
|
",
|
|
name, name
|
|
)
|
|
.unwrap();
|
|
|
|
for row in data {
|
|
write!(out, " __{}_inner!(({}));\n", name, row.join(",")).unwrap();
|
|
}
|
|
|
|
write!(
|
|
out,
|
|
" }};
|
|
}}"
|
|
)
|
|
.unwrap();
|
|
}
|