506 lines
16 KiB
Rust
506 lines
16 KiB
Rust
//! Simple PWM driver.
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use core::marker::PhantomData;
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use embassy_hal_internal::{into_ref, PeripheralRef};
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use super::low_level::{CountingMode, OutputCompareMode, OutputPolarity, Timer};
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use super::{Channel, Channel1Pin, Channel2Pin, Channel3Pin, Channel4Pin, GeneralInstance4Channel};
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use crate::gpio::{AfType, AnyPin, OutputType, Speed};
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use crate::time::Hertz;
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use crate::Peripheral;
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/// Channel 1 marker type.
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pub enum Ch1 {}
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/// Channel 2 marker type.
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pub enum Ch2 {}
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/// Channel 3 marker type.
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pub enum Ch3 {}
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/// Channel 4 marker type.
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pub enum Ch4 {}
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/// PWM pin wrapper.
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///
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/// This wraps a pin to make it usable with PWM.
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pub struct PwmPin<'d, T, C> {
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_pin: PeripheralRef<'d, AnyPin>,
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phantom: PhantomData<(T, C)>,
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}
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macro_rules! channel_impl {
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($new_chx:ident, $channel:ident, $pin_trait:ident) => {
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impl<'d, T: GeneralInstance4Channel> PwmPin<'d, T, $channel> {
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#[doc = concat!("Create a new ", stringify!($channel), " PWM pin instance.")]
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pub fn $new_chx(pin: impl Peripheral<P = impl $pin_trait<T>> + 'd, output_type: OutputType) -> Self {
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into_ref!(pin);
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critical_section::with(|_| {
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pin.set_low();
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pin.set_as_af(pin.af_num(), AfType::output(output_type, Speed::VeryHigh));
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});
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PwmPin {
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_pin: pin.map_into(),
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phantom: PhantomData,
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}
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}
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}
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};
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}
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channel_impl!(new_ch1, Ch1, Channel1Pin);
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channel_impl!(new_ch2, Ch2, Channel2Pin);
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channel_impl!(new_ch3, Ch3, Channel3Pin);
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channel_impl!(new_ch4, Ch4, Channel4Pin);
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/// A single channel of a pwm, obtained from [`SimplePwm::split`],
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/// [`SimplePwm::channel`], [`SimplePwm::ch1`], etc.
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///
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/// It is not possible to change the pwm frequency because
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/// the frequency configuration is shared with all four channels.
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pub struct SimplePwmChannel<'d, T: GeneralInstance4Channel> {
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timer: &'d Timer<'d, T>,
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channel: Channel,
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}
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// TODO: check for RMW races
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impl<'d, T: GeneralInstance4Channel> SimplePwmChannel<'d, T> {
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/// Enable the given channel.
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pub fn enable(&mut self) {
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self.timer.enable_channel(self.channel, true);
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}
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/// Disable the given channel.
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pub fn disable(&mut self) {
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self.timer.enable_channel(self.channel, false);
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}
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/// Check whether given channel is enabled
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pub fn is_enabled(&self) -> bool {
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self.timer.get_channel_enable_state(self.channel)
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}
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/// Get max duty value.
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///
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/// This value depends on the configured frequency and the timer's clock rate from RCC.
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pub fn max_duty_cycle(&self) -> u16 {
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let max = self.timer.get_max_compare_value();
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assert!(max < u16::MAX as u32);
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max as u16 + 1
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}
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/// Set the duty for a given channel.
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///
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/// The value ranges from 0 for 0% duty, to [`max_duty_cycle`](Self::max_duty_cycle) for 100% duty, both included.
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pub fn set_duty_cycle(&mut self, duty: u16) {
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assert!(duty <= (*self).max_duty_cycle());
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self.timer.set_compare_value(self.channel, duty.into())
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}
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fn set_duty_cycle_fully_off(&mut self) {
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self.set_duty_cycle(0);
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}
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fn set_duty_cycle_fully_on(&mut self) {
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self.set_duty_cycle((*self).max_duty_cycle());
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}
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fn set_duty_cycle_fraction(&mut self, num: u16, denom: u16) {
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assert!(denom != 0);
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assert!(num <= denom);
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let duty = u32::from(num) * u32::from(self.max_duty_cycle()) / u32::from(denom);
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// This is safe because we know that `num <= denom`, so `duty <= self.max_duty_cycle()` (u16)
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#[allow(clippy::cast_possible_truncation)]
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self.set_duty_cycle(duty as u16);
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}
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fn set_duty_cycle_percent(&mut self, percent: u8) {
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self.set_duty_cycle_fraction(u16::from(percent), 100)
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}
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/// Get the duty for a given channel.
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///
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/// The value ranges from 0 for 0% duty, to [`max_duty_cycle`](Self::max_duty_cycle) for 100% duty, both included.
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pub fn get_duty(&self) -> u16 {
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unwrap!(self.timer.get_compare_value(self.channel).try_into())
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}
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/// Set the output polarity for a given channel.
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pub fn set_polarity(&mut self, polarity: OutputPolarity) {
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self.timer.set_output_polarity(self.channel, polarity);
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}
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/// Set the output compare mode for a given channel.
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pub fn set_output_compare_mode(&mut self, mode: OutputCompareMode) {
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self.timer.set_output_compare_mode(self.channel, mode);
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}
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}
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/// A group of four [`SimplePwmChannel`]s, obtained from [`SimplePwm::split`].
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pub struct SimplePwmChannels<'d, T: GeneralInstance4Channel> {
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/// Channel 1
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pub ch1: SimplePwmChannel<'d, T>,
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/// Channel 2
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pub ch2: SimplePwmChannel<'d, T>,
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/// Channel 3
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pub ch3: SimplePwmChannel<'d, T>,
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/// Channel 4
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pub ch4: SimplePwmChannel<'d, T>,
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}
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/// Simple PWM driver.
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pub struct SimplePwm<'d, T: GeneralInstance4Channel> {
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inner: Timer<'d, T>,
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}
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impl<'d, T: GeneralInstance4Channel> SimplePwm<'d, T> {
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/// Create a new simple PWM driver.
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pub fn new(
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tim: impl Peripheral<P = T> + 'd,
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_ch1: Option<PwmPin<'d, T, Ch1>>,
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_ch2: Option<PwmPin<'d, T, Ch2>>,
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_ch3: Option<PwmPin<'d, T, Ch3>>,
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_ch4: Option<PwmPin<'d, T, Ch4>>,
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freq: Hertz,
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counting_mode: CountingMode,
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) -> Self {
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Self::new_inner(tim, freq, counting_mode)
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}
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fn new_inner(tim: impl Peripheral<P = T> + 'd, freq: Hertz, counting_mode: CountingMode) -> Self {
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let mut this = Self { inner: Timer::new(tim) };
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this.inner.set_counting_mode(counting_mode);
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this.set_frequency(freq);
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this.inner.enable_outputs(); // Required for advanced timers, see GeneralInstance4Channel for details
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this.inner.start();
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[Channel::Ch1, Channel::Ch2, Channel::Ch3, Channel::Ch4]
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.iter()
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.for_each(|&channel| {
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this.inner.set_output_compare_mode(channel, OutputCompareMode::PwmMode1);
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this.inner.set_output_compare_preload(channel, true);
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});
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this
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}
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/// Get a single channel
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///
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/// If you need to use multiple channels, use [`Self::split`].
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pub fn channel(&mut self, channel: Channel) -> SimplePwmChannel<'_, T> {
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SimplePwmChannel {
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timer: &self.inner,
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channel,
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}
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}
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/// Channel 1
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///
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/// This is just a convenience wrapper around [`Self::channel`].
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///
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/// If you need to use multiple channels, use [`Self::split`].
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pub fn ch1(&mut self) -> SimplePwmChannel<'_, T> {
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self.channel(Channel::Ch1)
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}
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/// Channel 2
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///
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/// This is just a convenience wrapper around [`Self::channel`].
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///
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/// If you need to use multiple channels, use [`Self::split`].
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pub fn ch2(&mut self) -> SimplePwmChannel<'_, T> {
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self.channel(Channel::Ch2)
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}
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/// Channel 3
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///
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/// This is just a convenience wrapper around [`Self::channel`].
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///
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/// If you need to use multiple channels, use [`Self::split`].
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pub fn ch3(&mut self) -> SimplePwmChannel<'_, T> {
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self.channel(Channel::Ch3)
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}
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/// Channel 4
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///
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/// This is just a convenience wrapper around [`Self::channel`].
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///
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/// If you need to use multiple channels, use [`Self::split`].
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pub fn ch4(&mut self) -> SimplePwmChannel<'_, T> {
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self.channel(Channel::Ch4)
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}
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/// Splits a [`SimplePwm`] into four pwm channels.
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///
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/// This returns all four channels, including channels that
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/// aren't configured with a [`PwmPin`].
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// TODO: I hate the name "split"
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pub fn split(&mut self) -> SimplePwmChannels<'_, T> {
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// TODO: pre-enable channels?
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// we can't use self.channel() because that takes &mut self
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let ch = |channel| SimplePwmChannel {
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timer: &self.inner,
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channel,
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};
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SimplePwmChannels {
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ch1: ch(Channel::Ch1),
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ch2: ch(Channel::Ch2),
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ch3: ch(Channel::Ch3),
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ch4: ch(Channel::Ch4),
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}
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}
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/// Set PWM frequency.
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///
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/// Note: when you call this, the max duty value changes, so you will have to
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/// call `set_duty` on all channels with the duty calculated based on the new max duty.
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pub fn set_frequency(&mut self, freq: Hertz) {
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// TODO: prevent ARR = u16::MAX?
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let multiplier = if self.inner.get_counting_mode().is_center_aligned() {
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2u8
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} else {
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1u8
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};
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self.inner.set_frequency(freq * multiplier);
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}
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/// Get max duty value.
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///
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/// This value depends on the configured frequency and the timer's clock rate from RCC.
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pub fn max_duty_cycle(&self) -> u16 {
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let max = self.inner.get_max_compare_value();
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assert!(max < u16::MAX as u32);
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max as u16 + 1
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}
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/// Generate a sequence of PWM waveform
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///
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/// Note:
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/// you will need to provide corresponding TIMx_UP DMA channel to use this method.
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pub async fn waveform_up(
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&mut self,
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dma: impl Peripheral<P = impl super::UpDma<T>>,
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channel: Channel,
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duty: &[u16],
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) {
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into_ref!(dma);
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#[allow(clippy::let_unit_value)] // eg. stm32f334
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let req = dma.request();
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let original_duty_state = self.channel(channel).get_duty();
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let original_enable_state = self.channel(channel).is_enabled();
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let original_update_dma_state = self.inner.get_update_dma_state();
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if !original_update_dma_state {
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self.inner.enable_update_dma(true);
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}
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if !original_enable_state {
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self.channel(channel).enable();
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}
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unsafe {
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#[cfg(not(any(bdma, gpdma)))]
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use crate::dma::{Burst, FifoThreshold};
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use crate::dma::{Transfer, TransferOptions};
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let dma_transfer_option = TransferOptions {
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#[cfg(not(any(bdma, gpdma)))]
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fifo_threshold: Some(FifoThreshold::Full),
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#[cfg(not(any(bdma, gpdma)))]
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mburst: Burst::Incr8,
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..Default::default()
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};
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Transfer::new_write(
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&mut dma,
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req,
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duty,
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self.inner.regs_1ch().ccr(channel.index()).as_ptr() as *mut _,
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dma_transfer_option,
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)
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.await
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};
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// restore output compare state
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if !original_enable_state {
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self.channel(channel).disable();
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}
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self.channel(channel).set_duty_cycle(original_duty_state);
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// Since DMA is closed before timer update event trigger DMA is turn off,
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// this can almost always trigger a DMA FIFO error.
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//
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// optional TODO:
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// clean FEIF after disable UDE
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if !original_update_dma_state {
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self.inner.enable_update_dma(false);
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}
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}
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}
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macro_rules! impl_waveform_chx {
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($fn_name:ident, $dma_ch:ident, $cc_ch:ident) => {
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impl<'d, T: GeneralInstance4Channel> SimplePwm<'d, T> {
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/// Generate a sequence of PWM waveform
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///
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/// Note:
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/// you will need to provide corresponding TIMx_CHy DMA channel to use this method.
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pub async fn $fn_name(&mut self, dma: impl Peripheral<P = impl super::$dma_ch<T>>, duty: &[u16]) {
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use crate::pac::timer::vals::Ccds;
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into_ref!(dma);
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#[allow(clippy::let_unit_value)] // eg. stm32f334
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let req = dma.request();
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let cc_channel = Channel::$cc_ch;
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let original_duty_state = self.channel(cc_channel).get_duty();
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let original_enable_state = self.channel(cc_channel).is_enabled();
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let original_cc_dma_on_update = self.inner.get_cc_dma_selection() == Ccds::ONUPDATE;
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let original_cc_dma_enabled = self.inner.get_cc_dma_enable_state(cc_channel);
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// redirect CC DMA request onto Update Event
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if !original_cc_dma_on_update {
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self.inner.set_cc_dma_selection(Ccds::ONUPDATE)
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}
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if !original_cc_dma_enabled {
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self.inner.set_cc_dma_enable_state(cc_channel, true);
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}
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if !original_enable_state {
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self.channel(cc_channel).enable();
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}
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unsafe {
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#[cfg(not(any(bdma, gpdma)))]
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use crate::dma::{Burst, FifoThreshold};
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use crate::dma::{Transfer, TransferOptions};
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let dma_transfer_option = TransferOptions {
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#[cfg(not(any(bdma, gpdma)))]
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fifo_threshold: Some(FifoThreshold::Full),
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#[cfg(not(any(bdma, gpdma)))]
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mburst: Burst::Incr8,
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..Default::default()
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};
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Transfer::new_write(
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&mut dma,
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req,
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duty,
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self.inner.regs_gp16().ccr(cc_channel.index()).as_ptr() as *mut _,
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dma_transfer_option,
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)
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.await
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};
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// restore output compare state
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if !original_enable_state {
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self.channel(cc_channel).disable();
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}
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self.channel(cc_channel).set_duty_cycle(original_duty_state);
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// Since DMA is closed before timer Capture Compare Event trigger DMA is turn off,
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// this can almost always trigger a DMA FIFO error.
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//
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// optional TODO:
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// clean FEIF after disable UDE
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if !original_cc_dma_enabled {
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self.inner.set_cc_dma_enable_state(cc_channel, false);
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}
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if !original_cc_dma_on_update {
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self.inner.set_cc_dma_selection(Ccds::ONCOMPARE)
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}
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}
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}
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};
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}
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impl_waveform_chx!(waveform_ch1, Ch1Dma, Ch1);
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impl_waveform_chx!(waveform_ch2, Ch2Dma, Ch2);
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impl_waveform_chx!(waveform_ch3, Ch3Dma, Ch3);
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impl_waveform_chx!(waveform_ch4, Ch4Dma, Ch4);
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impl<'d, T: GeneralInstance4Channel> embedded_hal_1::pwm::ErrorType for SimplePwmChannel<'d, T> {
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type Error = core::convert::Infallible;
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}
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impl<'d, T: GeneralInstance4Channel> embedded_hal_1::pwm::SetDutyCycle for SimplePwmChannel<'d, T> {
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fn max_duty_cycle(&self) -> u16 {
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self.max_duty_cycle()
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}
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fn set_duty_cycle(&mut self, duty: u16) -> Result<(), Self::Error> {
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self.set_duty_cycle(duty);
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Ok(())
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}
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fn set_duty_cycle_fully_off(&mut self) -> Result<(), Self::Error> {
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self.set_duty_cycle_fully_off();
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Ok(())
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}
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fn set_duty_cycle_fully_on(&mut self) -> Result<(), Self::Error> {
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self.set_duty_cycle_fully_on();
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Ok(())
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}
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fn set_duty_cycle_fraction(&mut self, num: u16, denom: u16) -> Result<(), Self::Error> {
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self.set_duty_cycle_fraction(num, denom);
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Ok(())
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}
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fn set_duty_cycle_percent(&mut self, percent: u8) -> Result<(), Self::Error> {
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self.set_duty_cycle_percent(percent);
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Ok(())
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}
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}
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impl<'d, T: GeneralInstance4Channel> embedded_hal_02::Pwm for SimplePwm<'d, T> {
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type Channel = Channel;
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type Time = Hertz;
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type Duty = u32;
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fn disable(&mut self, channel: Self::Channel) {
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self.inner.enable_channel(channel, false);
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}
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fn enable(&mut self, channel: Self::Channel) {
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self.inner.enable_channel(channel, true);
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}
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fn get_period(&self) -> Self::Time {
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self.inner.get_frequency()
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}
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fn get_duty(&self, channel: Self::Channel) -> Self::Duty {
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self.inner.get_compare_value(channel)
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}
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fn get_max_duty(&self) -> Self::Duty {
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self.inner.get_max_compare_value() + 1
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}
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fn set_duty(&mut self, channel: Self::Channel, duty: Self::Duty) {
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assert!(duty <= self.max_duty_cycle() as u32);
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self.inner.set_compare_value(channel, duty)
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}
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fn set_period<P>(&mut self, period: P)
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where
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P: Into<Self::Time>,
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{
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self.inner.set_frequency(period.into());
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}
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}
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