71 lines
1.9 KiB
Python
71 lines
1.9 KiB
Python
import sys
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import yaml
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import re
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import os
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import re
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abspath = os.path.abspath(__file__)
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dname = os.path.dirname(abspath)
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os.chdir(dname)
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data_path = '../stm32-data/data'
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try:
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_, chip_name, output_file = sys.argv
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except:
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raise Exception("Usage: gen.py STM32F429ZI path/to/generated.rs")
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# ======= load chip
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chip_name = chip_name.upper()
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with open(f'{data_path}/chips/{chip_name}.yaml', 'r') as f:
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chip = yaml.load(f, Loader=yaml.CSafeLoader)
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# ======= load GPIO AF
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with open(f'{data_path}/gpio_af/{chip["gpio_af"]}.yaml', 'r') as f:
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af = yaml.load(f, Loader=yaml.CSafeLoader)
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# ======= Generate!
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with open(output_file, 'w') as f:
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singletons = [] # USART1, PA5, EXTI8
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exti_interrupts = [] # EXTI IRQs, EXTI0, EXTI4_15 etc.
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pins = set() # set of all present pins. PA4, PA5...
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# ========= peripherals
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singletons.extend((f'EXTI{x}' for x in range(16)))
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num_dmas = 0
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for (name, peri) in chip['peripherals'].items():
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if 'block' not in peri:
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continue
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block = peri['block']
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block_mod, block_name_unparsed = block.rsplit('/')
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block_mod, block_version = block_mod.rsplit('_')
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block_name = ''
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for b in block_name_unparsed.split('_'):
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block_name += b.capitalize()
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custom_singletons = False
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if block_mod == 'gpio':
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custom_singletons = True
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port = name[4:]
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port_num = ord(port) - ord('A')
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for pin_num in range(16):
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pin = f'P{port}{pin_num}'
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pins.add(pin)
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singletons.append(pin)
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if block_mod == 'dma':
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custom_singletons = True
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for ch_num in range(8):
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channel = f'{name}_CH{ch_num}'
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singletons.append(channel)
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if not custom_singletons:
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singletons.append(name)
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f.write(f"embassy_extras::peripherals!({','.join(singletons)});")
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