1049 lines
34 KiB
Rust
1049 lines
34 KiB
Rust
pub mod filter;
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mod registers;
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use core::future::poll_fn;
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use core::marker::PhantomData;
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use core::task::Poll;
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use embassy_hal_internal::{into_ref, PeripheralRef};
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use embassy_sync::blocking_mutex::raw::CriticalSectionRawMutex;
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use embassy_sync::channel::Channel;
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use embassy_sync::waitqueue::AtomicWaker;
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pub use embedded_can::{ExtendedId, Id, StandardId};
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use self::filter::MasterFilters;
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use self::registers::{Registers, RxFifo};
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pub use super::common::{BufferedCanReceiver, BufferedCanSender};
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use super::frame::{Envelope, Frame};
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use super::util;
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use crate::can::enums::{BusError, TryReadError};
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use crate::gpio::AFType;
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use crate::interrupt::typelevel::Interrupt;
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use crate::rcc::{self, RccPeripheral};
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use crate::{interrupt, peripherals, Peripheral};
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/// Interrupt handler.
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pub struct TxInterruptHandler<T: Instance> {
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_phantom: PhantomData<T>,
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}
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impl<T: Instance> interrupt::typelevel::Handler<T::TXInterrupt> for TxInterruptHandler<T> {
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unsafe fn on_interrupt() {
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T::regs().tsr().write(|v| {
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v.set_rqcp(0, true);
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v.set_rqcp(1, true);
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v.set_rqcp(2, true);
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});
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T::state().tx_mode.on_interrupt::<T>();
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}
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}
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/// RX0 interrupt handler.
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pub struct Rx0InterruptHandler<T: Instance> {
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_phantom: PhantomData<T>,
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}
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impl<T: Instance> interrupt::typelevel::Handler<T::RX0Interrupt> for Rx0InterruptHandler<T> {
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unsafe fn on_interrupt() {
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T::state().rx_mode.on_interrupt::<T>(RxFifo::Fifo0);
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}
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}
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/// RX1 interrupt handler.
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pub struct Rx1InterruptHandler<T: Instance> {
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_phantom: PhantomData<T>,
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}
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impl<T: Instance> interrupt::typelevel::Handler<T::RX1Interrupt> for Rx1InterruptHandler<T> {
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unsafe fn on_interrupt() {
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T::state().rx_mode.on_interrupt::<T>(RxFifo::Fifo1);
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}
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}
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/// SCE interrupt handler.
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pub struct SceInterruptHandler<T: Instance> {
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_phantom: PhantomData<T>,
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}
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impl<T: Instance> interrupt::typelevel::Handler<T::SCEInterrupt> for SceInterruptHandler<T> {
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unsafe fn on_interrupt() {
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info!("sce irq");
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let msr = T::regs().msr();
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let msr_val = msr.read();
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if msr_val.slaki() {
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msr.modify(|m| m.set_slaki(true));
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T::state().err_waker.wake();
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} else if msr_val.erri() {
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info!("Error interrupt");
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// Disable the interrupt, but don't acknowledge the error, so that it can be
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// forwarded off the the bus message consumer. If we don't provide some way for
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// downstream code to determine that it has already provided this bus error instance
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// to the bus message consumer, we are doomed to re-provide a single error instance for
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// an indefinite amount of time.
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let ier = T::regs().ier();
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ier.modify(|i| i.set_errie(false));
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T::state().err_waker.wake();
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}
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}
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}
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/// Configuration proxy returned by [`Can::modify_config`].
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pub struct CanConfig<'a, T: Instance> {
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can: PhantomData<&'a mut T>,
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}
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impl<T: Instance> CanConfig<'_, T> {
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/// Configures the bit timings.
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///
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/// You can use <http://www.bittiming.can-wiki.info/> to calculate the `btr` parameter. Enter
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/// parameters as follows:
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///
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/// - *Clock Rate*: The input clock speed to the CAN peripheral (*not* the CPU clock speed).
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/// This is the clock rate of the peripheral bus the CAN peripheral is attached to (eg. APB1).
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/// - *Sample Point*: Should normally be left at the default value of 87.5%.
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/// - *SJW*: Should normally be left at the default value of 1.
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///
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/// Then copy the `CAN_BUS_TIME` register value from the table and pass it as the `btr`
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/// parameter to this method.
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pub fn set_bit_timing(self, bt: crate::can::util::NominalBitTiming) -> Self {
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Registers(T::regs()).set_bit_timing(bt);
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self
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}
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/// Configure the CAN bit rate.
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///
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/// This is a helper that internally calls `set_bit_timing()`[Self::set_bit_timing].
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pub fn set_bitrate(self, bitrate: u32) -> Self {
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let bit_timing = util::calc_can_timings(T::frequency(), bitrate).unwrap();
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self.set_bit_timing(bit_timing)
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}
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/// Enables or disables loopback mode: Internally connects the TX and RX
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/// signals together.
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pub fn set_loopback(self, enabled: bool) -> Self {
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Registers(T::regs()).set_loopback(enabled);
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self
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}
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/// Enables or disables silent mode: Disconnects the TX signal from the pin.
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pub fn set_silent(self, enabled: bool) -> Self {
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Registers(T::regs()).set_silent(enabled);
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self
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}
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/// Enables or disables automatic retransmission of messages.
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///
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/// If this is enabled, the CAN peripheral will automatically try to retransmit each frame
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/// until it can be sent. Otherwise, it will try only once to send each frame.
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///
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/// Automatic retransmission is enabled by default.
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pub fn set_automatic_retransmit(self, enabled: bool) -> Self {
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Registers(T::regs()).set_automatic_retransmit(enabled);
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self
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}
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}
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impl<T: Instance> Drop for CanConfig<'_, T> {
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#[inline]
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fn drop(&mut self) {
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Registers(T::regs()).leave_init_mode();
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}
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}
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/// CAN driver
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pub struct Can<'d, T: Instance> {
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peri: PeripheralRef<'d, T>,
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}
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/// Error returned by `try_write`
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#[derive(Debug)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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pub enum TryWriteError {
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/// All transmit mailboxes are full
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Full,
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}
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impl<'d, T: Instance> Can<'d, T> {
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/// Creates a new Bxcan instance, keeping the peripheral in sleep mode.
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/// You must call [Can::enable_non_blocking] to use the peripheral.
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pub fn new(
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peri: impl Peripheral<P = T> + 'd,
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rx: impl Peripheral<P = impl RxPin<T>> + 'd,
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tx: impl Peripheral<P = impl TxPin<T>> + 'd,
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_irqs: impl interrupt::typelevel::Binding<T::TXInterrupt, TxInterruptHandler<T>>
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+ interrupt::typelevel::Binding<T::RX0Interrupt, Rx0InterruptHandler<T>>
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+ interrupt::typelevel::Binding<T::RX1Interrupt, Rx1InterruptHandler<T>>
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+ interrupt::typelevel::Binding<T::SCEInterrupt, SceInterruptHandler<T>>
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+ 'd,
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) -> Self {
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into_ref!(peri, rx, tx);
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rx.set_as_af(rx.af_num(), AFType::Input);
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tx.set_as_af(tx.af_num(), AFType::OutputPushPull);
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rcc::enable_and_reset::<T>();
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{
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T::regs().ier().write(|w| {
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w.set_errie(true);
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w.set_fmpie(0, true);
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w.set_fmpie(1, true);
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w.set_tmeie(true);
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w.set_bofie(true);
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w.set_epvie(true);
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w.set_ewgie(true);
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w.set_lecie(true);
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});
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T::regs().mcr().write(|w| {
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// Enable timestamps on rx messages
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w.set_ttcm(true);
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});
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}
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unsafe {
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T::TXInterrupt::unpend();
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T::TXInterrupt::enable();
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T::RX0Interrupt::unpend();
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T::RX0Interrupt::enable();
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T::RX1Interrupt::unpend();
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T::RX1Interrupt::enable();
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T::SCEInterrupt::unpend();
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T::SCEInterrupt::enable();
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}
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rx.set_as_af(rx.af_num(), AFType::Input);
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tx.set_as_af(tx.af_num(), AFType::OutputPushPull);
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Registers(T::regs()).leave_init_mode();
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Self { peri }
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}
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/// Set CAN bit rate.
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pub fn set_bitrate(&mut self, bitrate: u32) {
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let bit_timing = util::calc_can_timings(T::frequency(), bitrate).unwrap();
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self.modify_config().set_bit_timing(bit_timing);
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}
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/// Configure bit timings and silent/loop-back mode.
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///
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/// Calling this method will enter initialization mode. You must enable the peripheral
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/// again afterwards with [`enable`](Self::enable).
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pub fn modify_config(&mut self) -> CanConfig<'_, T> {
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Registers(T::regs()).enter_init_mode();
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CanConfig { can: PhantomData }
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}
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/// Enables the peripheral and synchronizes with the bus.
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///
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/// This will wait for 11 consecutive recessive bits (bus idle state).
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/// Contrary to enable method from bxcan library, this will not freeze the executor while waiting.
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pub async fn enable(&mut self) {
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while Registers(T::regs()).enable_non_blocking().is_err() {
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// SCE interrupt is only generated for entering sleep mode, but not leaving.
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// Yield to allow other tasks to execute while can bus is initializing.
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embassy_futures::yield_now().await;
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}
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}
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/// Enables or disables the peripheral from automatically wakeup when a SOF is detected on the bus
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/// while the peripheral is in sleep mode
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pub fn set_automatic_wakeup(&mut self, enabled: bool) {
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Registers(T::regs()).set_automatic_wakeup(enabled);
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}
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/// Manually wake the peripheral from sleep mode.
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///
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/// Waking the peripheral manually does not trigger a wake-up interrupt.
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/// This will wait until the peripheral has acknowledged it has awoken from sleep mode
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pub fn wakeup(&mut self) {
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Registers(T::regs()).wakeup()
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}
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/// Check if the peripheral is currently in sleep mode
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pub fn is_sleeping(&self) -> bool {
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T::regs().msr().read().slak()
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}
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/// Put the peripheral in sleep mode
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///
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/// When the peripherial is in sleep mode, messages can still be queued for transmission
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/// and any previously received messages can be read from the receive FIFOs, however
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/// no messages will be transmitted and no additional messages will be received.
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///
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/// If the peripheral has automatic wakeup enabled, when a Start-of-Frame is detected
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/// the peripheral will automatically wake and receive the incoming message.
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pub async fn sleep(&mut self) {
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T::regs().ier().modify(|i| i.set_slkie(true));
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T::regs().mcr().modify(|m| m.set_sleep(true));
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poll_fn(|cx| {
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T::state().err_waker.register(cx.waker());
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if self.is_sleeping() {
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Poll::Ready(())
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} else {
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Poll::Pending
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}
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})
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.await;
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T::regs().ier().modify(|i| i.set_slkie(false));
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}
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/// Queues the message to be sent.
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///
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/// If the TX queue is full, this will wait until there is space, therefore exerting backpressure.
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pub async fn write(&mut self, frame: &Frame) -> TransmitStatus {
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self.split().0.write(frame).await
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}
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/// Attempts to transmit a frame without blocking.
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///
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/// Returns [Err(TryWriteError::Full)] if all transmit mailboxes are full.
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pub fn try_write(&mut self, frame: &Frame) -> Result<TransmitStatus, TryWriteError> {
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self.split().0.try_write(frame)
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}
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/// Waits for a specific transmit mailbox to become empty
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pub async fn flush(&self, mb: Mailbox) {
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CanTx::<T>::flush_inner(mb).await
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}
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/// Waits until any of the transmit mailboxes become empty
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pub async fn flush_any(&self) {
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CanTx::<T>::flush_any_inner().await
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}
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/// Waits until all of the transmit mailboxes become empty
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pub async fn flush_all(&self) {
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CanTx::<T>::flush_all_inner().await
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}
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/// Attempts to abort the sending of a frame that is pending in a mailbox.
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///
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/// If there is no frame in the provided mailbox, or its transmission succeeds before it can be
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/// aborted, this function has no effect and returns `false`.
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///
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/// If there is a frame in the provided mailbox, and it is canceled successfully, this function
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/// returns `true`.
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pub fn abort(&mut self, mailbox: Mailbox) -> bool {
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Registers(T::regs()).abort(mailbox)
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}
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/// Returns `true` if no frame is pending for transmission.
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pub fn is_transmitter_idle(&self) -> bool {
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Registers(T::regs()).is_idle()
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}
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/// Read a CAN frame.
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///
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/// If no CAN frame is in the RX buffer, this will wait until there is one.
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///
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/// Returns a tuple of the time the message was received and the message frame
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pub async fn read(&mut self) -> Result<Envelope, BusError> {
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T::state().rx_mode.read::<T>().await
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}
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/// Attempts to read a CAN frame without blocking.
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///
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/// Returns [Err(TryReadError::Empty)] if there are no frames in the rx queue.
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pub fn try_read(&mut self) -> Result<Envelope, TryReadError> {
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T::state().rx_mode.try_read::<T>()
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}
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/// Waits while receive queue is empty.
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pub async fn wait_not_empty(&mut self) {
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T::state().rx_mode.wait_not_empty::<T>().await
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}
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/// Split the CAN driver into transmit and receive halves.
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///
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/// Useful for doing separate transmit/receive tasks.
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pub fn split<'c>(&'c mut self) -> (CanTx<'d, T>, CanRx<'d, T>) {
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(
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CanTx {
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_peri: unsafe { self.peri.clone_unchecked() },
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},
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CanRx {
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peri: unsafe { self.peri.clone_unchecked() },
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},
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)
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}
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/// Return a buffered instance of driver. User must supply Buffers
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pub fn buffered<'c, const TX_BUF_SIZE: usize, const RX_BUF_SIZE: usize>(
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&'c mut self,
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txb: &'static mut TxBuf<TX_BUF_SIZE>,
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rxb: &'static mut RxBuf<RX_BUF_SIZE>,
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) -> BufferedCan<'d, T, TX_BUF_SIZE, RX_BUF_SIZE> {
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let (tx, rx) = self.split();
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BufferedCan {
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tx: tx.buffered(txb),
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rx: rx.buffered(rxb),
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}
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}
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}
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impl<'d, T: FilterOwner> Can<'d, T> {
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/// Accesses the filter banks owned by this CAN peripheral.
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///
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/// To modify filters of a slave peripheral, `modify_filters` has to be called on the master
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/// peripheral instead.
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pub fn modify_filters(&mut self) -> MasterFilters<'_, T> {
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unsafe { MasterFilters::new(T::regs()) }
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}
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}
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/// Buffered CAN driver.
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pub struct BufferedCan<'d, T: Instance, const TX_BUF_SIZE: usize, const RX_BUF_SIZE: usize> {
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tx: BufferedCanTx<'d, T, TX_BUF_SIZE>,
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rx: BufferedCanRx<'d, T, RX_BUF_SIZE>,
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}
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impl<'d, T: Instance, const TX_BUF_SIZE: usize, const RX_BUF_SIZE: usize> BufferedCan<'d, T, TX_BUF_SIZE, RX_BUF_SIZE> {
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/// Async write frame to TX buffer.
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pub async fn write(&mut self, frame: &Frame) {
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self.tx.write(frame).await
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}
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/// Returns a sender that can be used for sending CAN frames.
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pub fn writer(&self) -> BufferedCanSender {
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self.tx.writer()
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}
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/// Async read frame from RX buffer.
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pub async fn read(&mut self) -> Result<Envelope, BusError> {
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self.rx.read().await
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}
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/// Attempts to read a CAN frame without blocking.
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///
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/// Returns [Err(TryReadError::Empty)] if there are no frames in the rx queue.
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pub fn try_read(&mut self) -> Result<Envelope, TryReadError> {
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self.rx.try_read()
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}
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/// Waits while receive queue is empty.
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pub async fn wait_not_empty(&mut self) {
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self.rx.wait_not_empty().await
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}
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/// Returns a receiver that can be used for receiving CAN frames. Note, each CAN frame will only be received by one receiver.
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pub fn reader(&self) -> BufferedCanReceiver {
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self.rx.reader()
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}
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}
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/// CAN driver, transmit half.
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pub struct CanTx<'d, T: Instance> {
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_peri: PeripheralRef<'d, T>,
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}
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impl<'d, T: Instance> CanTx<'d, T> {
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/// Queues the message to be sent.
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///
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/// If the TX queue is full, this will wait until there is space, therefore exerting backpressure.
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pub async fn write(&mut self, frame: &Frame) -> TransmitStatus {
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poll_fn(|cx| {
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T::state().tx_mode.register(cx.waker());
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if let Ok(status) = Registers(T::regs()).transmit(frame) {
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return Poll::Ready(status);
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}
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Poll::Pending
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})
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.await
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}
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/// Attempts to transmit a frame without blocking.
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///
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/// Returns [Err(TryWriteError::Full)] if all transmit mailboxes are full.
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pub fn try_write(&mut self, frame: &Frame) -> Result<TransmitStatus, TryWriteError> {
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Registers(T::regs()).transmit(frame).map_err(|_| TryWriteError::Full)
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}
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async fn flush_inner(mb: Mailbox) {
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poll_fn(|cx| {
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T::state().tx_mode.register(cx.waker());
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if T::regs().tsr().read().tme(mb.index()) {
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return Poll::Ready(());
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}
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Poll::Pending
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})
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.await;
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}
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/// Waits for a specific transmit mailbox to become empty
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pub async fn flush(&self, mb: Mailbox) {
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Self::flush_inner(mb).await
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}
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async fn flush_any_inner() {
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poll_fn(|cx| {
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T::state().tx_mode.register(cx.waker());
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let tsr = T::regs().tsr().read();
|
|
if tsr.tme(Mailbox::Mailbox0.index())
|
|
|| tsr.tme(Mailbox::Mailbox1.index())
|
|
|| tsr.tme(Mailbox::Mailbox2.index())
|
|
{
|
|
return Poll::Ready(());
|
|
}
|
|
|
|
Poll::Pending
|
|
})
|
|
.await;
|
|
}
|
|
|
|
/// Waits until any of the transmit mailboxes become empty
|
|
pub async fn flush_any(&self) {
|
|
Self::flush_any_inner().await
|
|
}
|
|
|
|
async fn flush_all_inner() {
|
|
poll_fn(|cx| {
|
|
T::state().tx_mode.register(cx.waker());
|
|
|
|
let tsr = T::regs().tsr().read();
|
|
if tsr.tme(Mailbox::Mailbox0.index())
|
|
&& tsr.tme(Mailbox::Mailbox1.index())
|
|
&& tsr.tme(Mailbox::Mailbox2.index())
|
|
{
|
|
return Poll::Ready(());
|
|
}
|
|
|
|
Poll::Pending
|
|
})
|
|
.await;
|
|
}
|
|
|
|
/// Waits until all of the transmit mailboxes become empty
|
|
pub async fn flush_all(&self) {
|
|
Self::flush_all_inner().await
|
|
}
|
|
|
|
/// Attempts to abort the sending of a frame that is pending in a mailbox.
|
|
///
|
|
/// If there is no frame in the provided mailbox, or its transmission succeeds before it can be
|
|
/// aborted, this function has no effect and returns `false`.
|
|
///
|
|
/// If there is a frame in the provided mailbox, and it is canceled successfully, this function
|
|
/// returns `true`.
|
|
pub fn abort(&mut self, mailbox: Mailbox) -> bool {
|
|
Registers(T::regs()).abort(mailbox)
|
|
}
|
|
|
|
/// Returns `true` if no frame is pending for transmission.
|
|
pub fn is_idle(&self) -> bool {
|
|
Registers(T::regs()).is_idle()
|
|
}
|
|
|
|
/// Return a buffered instance of driver. User must supply Buffers
|
|
pub fn buffered<const TX_BUF_SIZE: usize>(
|
|
self,
|
|
txb: &'static mut TxBuf<TX_BUF_SIZE>,
|
|
) -> BufferedCanTx<'d, T, TX_BUF_SIZE> {
|
|
BufferedCanTx::new(self, txb)
|
|
}
|
|
}
|
|
|
|
/// User supplied buffer for TX buffering
|
|
pub type TxBuf<const BUF_SIZE: usize> = Channel<CriticalSectionRawMutex, Frame, BUF_SIZE>;
|
|
|
|
/// Buffered CAN driver, transmit half.
|
|
pub struct BufferedCanTx<'d, T: Instance, const TX_BUF_SIZE: usize> {
|
|
_tx: CanTx<'d, T>,
|
|
tx_buf: &'static TxBuf<TX_BUF_SIZE>,
|
|
}
|
|
|
|
impl<'d, T: Instance, const TX_BUF_SIZE: usize> BufferedCanTx<'d, T, TX_BUF_SIZE> {
|
|
fn new(_tx: CanTx<'d, T>, tx_buf: &'static TxBuf<TX_BUF_SIZE>) -> Self {
|
|
Self { _tx, tx_buf }.setup()
|
|
}
|
|
|
|
fn setup(self) -> Self {
|
|
// We don't want interrupts being processed while we change modes.
|
|
critical_section::with(|_| unsafe {
|
|
let tx_inner = super::common::ClassicBufferedTxInner {
|
|
tx_receiver: self.tx_buf.receiver().into(),
|
|
};
|
|
T::mut_state().tx_mode = TxMode::Buffered(tx_inner);
|
|
});
|
|
self
|
|
}
|
|
|
|
/// Async write frame to TX buffer.
|
|
pub async fn write(&mut self, frame: &Frame) {
|
|
self.tx_buf.send(*frame).await;
|
|
T::TXInterrupt::pend(); // Wake for Tx
|
|
}
|
|
|
|
/// Returns a sender that can be used for sending CAN frames.
|
|
pub fn writer(&self) -> BufferedCanSender {
|
|
BufferedCanSender {
|
|
tx_buf: self.tx_buf.sender().into(),
|
|
waker: T::TXInterrupt::pend,
|
|
}
|
|
}
|
|
}
|
|
|
|
impl<'d, T: Instance, const TX_BUF_SIZE: usize> Drop for BufferedCanTx<'d, T, TX_BUF_SIZE> {
|
|
fn drop(&mut self) {
|
|
critical_section::with(|_| unsafe {
|
|
T::mut_state().tx_mode = TxMode::NonBuffered(embassy_sync::waitqueue::AtomicWaker::new());
|
|
});
|
|
}
|
|
}
|
|
|
|
/// CAN driver, receive half.
|
|
#[allow(dead_code)]
|
|
pub struct CanRx<'d, T: Instance> {
|
|
peri: PeripheralRef<'d, T>,
|
|
}
|
|
|
|
impl<'d, T: Instance> CanRx<'d, T> {
|
|
/// Read a CAN frame.
|
|
///
|
|
/// If no CAN frame is in the RX buffer, this will wait until there is one.
|
|
///
|
|
/// Returns a tuple of the time the message was received and the message frame
|
|
pub async fn read(&mut self) -> Result<Envelope, BusError> {
|
|
T::state().rx_mode.read::<T>().await
|
|
}
|
|
|
|
/// Attempts to read a CAN frame without blocking.
|
|
///
|
|
/// Returns [Err(TryReadError::Empty)] if there are no frames in the rx queue.
|
|
pub fn try_read(&mut self) -> Result<Envelope, TryReadError> {
|
|
T::state().rx_mode.try_read::<T>()
|
|
}
|
|
|
|
/// Waits while receive queue is empty.
|
|
pub async fn wait_not_empty(&mut self) {
|
|
T::state().rx_mode.wait_not_empty::<T>().await
|
|
}
|
|
|
|
/// Return a buffered instance of driver. User must supply Buffers
|
|
pub fn buffered<const RX_BUF_SIZE: usize>(
|
|
self,
|
|
rxb: &'static mut RxBuf<RX_BUF_SIZE>,
|
|
) -> BufferedCanRx<'d, T, RX_BUF_SIZE> {
|
|
BufferedCanRx::new(self, rxb)
|
|
}
|
|
}
|
|
|
|
/// User supplied buffer for RX Buffering
|
|
pub type RxBuf<const BUF_SIZE: usize> = Channel<CriticalSectionRawMutex, Result<Envelope, BusError>, BUF_SIZE>;
|
|
|
|
/// CAN driver, receive half in Buffered mode.
|
|
pub struct BufferedCanRx<'d, T: Instance, const RX_BUF_SIZE: usize> {
|
|
_rx: CanRx<'d, T>,
|
|
rx_buf: &'static RxBuf<RX_BUF_SIZE>,
|
|
}
|
|
|
|
impl<'d, T: Instance, const RX_BUF_SIZE: usize> BufferedCanRx<'d, T, RX_BUF_SIZE> {
|
|
fn new(_rx: CanRx<'d, T>, rx_buf: &'static RxBuf<RX_BUF_SIZE>) -> Self {
|
|
BufferedCanRx { _rx, rx_buf }.setup()
|
|
}
|
|
|
|
fn setup(self) -> Self {
|
|
// We don't want interrupts being processed while we change modes.
|
|
critical_section::with(|_| unsafe {
|
|
let rx_inner = super::common::ClassicBufferedRxInner {
|
|
rx_sender: self.rx_buf.sender().into(),
|
|
};
|
|
T::mut_state().rx_mode = RxMode::Buffered(rx_inner);
|
|
});
|
|
self
|
|
}
|
|
|
|
/// Async read frame from RX buffer.
|
|
pub async fn read(&mut self) -> Result<Envelope, BusError> {
|
|
self.rx_buf.receive().await
|
|
}
|
|
|
|
/// Attempts to read a CAN frame without blocking.
|
|
///
|
|
/// Returns [Err(TryReadError::Empty)] if there are no frames in the rx queue.
|
|
pub fn try_read(&mut self) -> Result<Envelope, TryReadError> {
|
|
match &T::state().rx_mode {
|
|
RxMode::Buffered(_) => {
|
|
if let Ok(result) = self.rx_buf.try_receive() {
|
|
match result {
|
|
Ok(envelope) => Ok(envelope),
|
|
Err(e) => Err(TryReadError::BusError(e)),
|
|
}
|
|
} else {
|
|
if let Some(err) = Registers(T::regs()).curr_error() {
|
|
return Err(TryReadError::BusError(err));
|
|
} else {
|
|
Err(TryReadError::Empty)
|
|
}
|
|
}
|
|
}
|
|
_ => {
|
|
panic!("Bad Mode")
|
|
}
|
|
}
|
|
}
|
|
|
|
/// Waits while receive queue is empty.
|
|
pub async fn wait_not_empty(&mut self) {
|
|
poll_fn(|cx| self.rx_buf.poll_ready_to_receive(cx)).await
|
|
}
|
|
|
|
/// Returns a receiver that can be used for receiving CAN frames. Note, each CAN frame will only be received by one receiver.
|
|
pub fn reader(&self) -> BufferedCanReceiver {
|
|
self.rx_buf.receiver().into()
|
|
}
|
|
}
|
|
|
|
impl<'d, T: Instance, const RX_BUF_SIZE: usize> Drop for BufferedCanRx<'d, T, RX_BUF_SIZE> {
|
|
fn drop(&mut self) {
|
|
critical_section::with(|_| unsafe {
|
|
T::mut_state().rx_mode = RxMode::NonBuffered(embassy_sync::waitqueue::AtomicWaker::new());
|
|
});
|
|
}
|
|
}
|
|
|
|
impl<'d, T: Instance> Drop for Can<'d, T> {
|
|
fn drop(&mut self) {
|
|
// Cannot call `free()` because it moves the instance.
|
|
// Manually reset the peripheral.
|
|
T::regs().mcr().write(|w| w.set_reset(true));
|
|
rcc::disable::<T>();
|
|
}
|
|
}
|
|
|
|
/// Identifies one of the two receive FIFOs.
|
|
#[derive(Debug, Clone, Copy, PartialEq, Eq, PartialOrd, Ord)]
|
|
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
|
|
pub enum Fifo {
|
|
/// First receive FIFO
|
|
Fifo0 = 0,
|
|
/// Second receive FIFO
|
|
Fifo1 = 1,
|
|
}
|
|
|
|
/// Identifies one of the three transmit mailboxes.
|
|
#[derive(Debug, Copy, Clone, Ord, PartialOrd, Eq, PartialEq)]
|
|
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
|
|
pub enum Mailbox {
|
|
/// Transmit mailbox 0
|
|
Mailbox0 = 0,
|
|
/// Transmit mailbox 1
|
|
Mailbox1 = 1,
|
|
/// Transmit mailbox 2
|
|
Mailbox2 = 2,
|
|
}
|
|
|
|
/// Contains information about a frame enqueued for transmission via [`Can::transmit`] or
|
|
/// [`Tx::transmit`].
|
|
pub struct TransmitStatus {
|
|
dequeued_frame: Option<Frame>,
|
|
mailbox: Mailbox,
|
|
}
|
|
|
|
impl TransmitStatus {
|
|
/// Returns the lower-priority frame that was dequeued to make space for the new frame.
|
|
#[inline]
|
|
pub fn dequeued_frame(&self) -> Option<&Frame> {
|
|
self.dequeued_frame.as_ref()
|
|
}
|
|
|
|
/// Returns the [`Mailbox`] the frame was enqueued in.
|
|
#[inline]
|
|
pub fn mailbox(&self) -> Mailbox {
|
|
self.mailbox
|
|
}
|
|
}
|
|
|
|
pub(crate) enum RxMode {
|
|
NonBuffered(AtomicWaker),
|
|
Buffered(super::common::ClassicBufferedRxInner),
|
|
}
|
|
|
|
impl RxMode {
|
|
pub fn on_interrupt<T: Instance>(&self, fifo: RxFifo) {
|
|
match self {
|
|
Self::NonBuffered(waker) => {
|
|
// Disable interrupts until read
|
|
let fifo_idx = match fifo {
|
|
RxFifo::Fifo0 => 0usize,
|
|
RxFifo::Fifo1 => 1usize,
|
|
};
|
|
T::regs().ier().write(|w| {
|
|
w.set_fmpie(fifo_idx, false);
|
|
});
|
|
waker.wake();
|
|
}
|
|
Self::Buffered(buf) => {
|
|
loop {
|
|
match Registers(T::regs()).receive_fifo(fifo) {
|
|
Some(envelope) => {
|
|
// NOTE: consensus was reached that if rx_queue is full, packets should be dropped
|
|
let _ = buf.rx_sender.try_send(Ok(envelope));
|
|
}
|
|
None => return,
|
|
};
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
pub async fn read<T: Instance>(&self) -> Result<Envelope, BusError> {
|
|
match self {
|
|
Self::NonBuffered(waker) => {
|
|
poll_fn(|cx| {
|
|
T::state().err_waker.register(cx.waker());
|
|
waker.register(cx.waker());
|
|
match self.try_read::<T>() {
|
|
Ok(result) => Poll::Ready(Ok(result)),
|
|
Err(TryReadError::Empty) => Poll::Pending,
|
|
Err(TryReadError::BusError(be)) => Poll::Ready(Err(be)),
|
|
}
|
|
})
|
|
.await
|
|
}
|
|
_ => {
|
|
panic!("Bad Mode")
|
|
}
|
|
}
|
|
}
|
|
pub fn try_read<T: Instance>(&self) -> Result<Envelope, TryReadError> {
|
|
match self {
|
|
Self::NonBuffered(_) => {
|
|
let registers = Registers(T::regs());
|
|
if let Some(msg) = registers.receive_fifo(RxFifo::Fifo0) {
|
|
T::regs().ier().write(|w| {
|
|
w.set_fmpie(0, true);
|
|
});
|
|
Ok(msg)
|
|
} else if let Some(msg) = registers.receive_fifo(RxFifo::Fifo1) {
|
|
T::regs().ier().write(|w| {
|
|
w.set_fmpie(1, true);
|
|
});
|
|
Ok(msg)
|
|
} else if let Some(err) = registers.curr_error() {
|
|
Err(TryReadError::BusError(err))
|
|
} else {
|
|
Err(TryReadError::Empty)
|
|
}
|
|
}
|
|
_ => {
|
|
panic!("Bad Mode")
|
|
}
|
|
}
|
|
}
|
|
pub async fn wait_not_empty<T: Instance>(&self) {
|
|
match &T::state().rx_mode {
|
|
Self::NonBuffered(waker) => {
|
|
poll_fn(|cx| {
|
|
waker.register(cx.waker());
|
|
if Registers(T::regs()).receive_frame_available() {
|
|
Poll::Ready(())
|
|
} else {
|
|
Poll::Pending
|
|
}
|
|
})
|
|
.await
|
|
}
|
|
_ => {
|
|
panic!("Bad Mode")
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
enum TxMode {
|
|
NonBuffered(AtomicWaker),
|
|
Buffered(super::common::ClassicBufferedTxInner),
|
|
}
|
|
|
|
impl TxMode {
|
|
pub fn buffer_free<T: Instance>(&self) -> bool {
|
|
let tsr = T::regs().tsr().read();
|
|
tsr.tme(Mailbox::Mailbox0.index()) || tsr.tme(Mailbox::Mailbox1.index()) || tsr.tme(Mailbox::Mailbox2.index())
|
|
}
|
|
pub fn on_interrupt<T: Instance>(&self) {
|
|
match &T::state().tx_mode {
|
|
TxMode::NonBuffered(waker) => waker.wake(),
|
|
TxMode::Buffered(buf) => {
|
|
while self.buffer_free::<T>() {
|
|
match buf.tx_receiver.try_receive() {
|
|
Ok(frame) => {
|
|
_ = Registers(T::regs()).transmit(&frame);
|
|
}
|
|
Err(_) => {
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
fn register(&self, arg: &core::task::Waker) {
|
|
match self {
|
|
TxMode::NonBuffered(waker) => {
|
|
waker.register(arg);
|
|
}
|
|
_ => {
|
|
panic!("Bad mode");
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
struct State {
|
|
pub(crate) rx_mode: RxMode,
|
|
pub(crate) tx_mode: TxMode,
|
|
pub err_waker: AtomicWaker,
|
|
}
|
|
|
|
impl State {
|
|
pub const fn new() -> Self {
|
|
Self {
|
|
rx_mode: RxMode::NonBuffered(AtomicWaker::new()),
|
|
tx_mode: TxMode::NonBuffered(AtomicWaker::new()),
|
|
err_waker: AtomicWaker::new(),
|
|
}
|
|
}
|
|
}
|
|
|
|
trait SealedInstance {
|
|
fn regs() -> crate::pac::can::Can;
|
|
fn state() -> &'static State;
|
|
unsafe fn mut_state() -> &'static mut State;
|
|
}
|
|
|
|
/// CAN instance trait.
|
|
#[allow(private_bounds)]
|
|
pub trait Instance: Peripheral<P = Self> + SealedInstance + RccPeripheral + 'static {
|
|
/// TX interrupt for this instance.
|
|
type TXInterrupt: crate::interrupt::typelevel::Interrupt;
|
|
/// RX0 interrupt for this instance.
|
|
type RX0Interrupt: crate::interrupt::typelevel::Interrupt;
|
|
/// RX1 interrupt for this instance.
|
|
type RX1Interrupt: crate::interrupt::typelevel::Interrupt;
|
|
/// SCE interrupt for this instance.
|
|
type SCEInterrupt: crate::interrupt::typelevel::Interrupt;
|
|
}
|
|
|
|
/// A bxCAN instance that owns filter banks.
|
|
///
|
|
/// In master-slave-instance setups, only the master instance owns the filter banks, and needs to
|
|
/// split some of them off for use by the slave instance. In that case, the master instance should
|
|
/// implement [`FilterOwner`] and [`MasterInstance`], while the slave instance should only implement
|
|
/// [`Instance`].
|
|
///
|
|
/// In single-instance configurations, the instance owns all filter banks and they can not be split
|
|
/// off. In that case, the instance should implement [`Instance`] and [`FilterOwner`].
|
|
///
|
|
/// # Safety
|
|
///
|
|
/// This trait must only be implemented if the instance does, in fact, own its associated filter
|
|
/// banks, and `NUM_FILTER_BANKS` must be correct.
|
|
pub unsafe trait FilterOwner: Instance {
|
|
/// The total number of filter banks available to the instance.
|
|
///
|
|
/// This is usually either 14 or 28, and should be specified in the chip's reference manual or datasheet.
|
|
const NUM_FILTER_BANKS: u8;
|
|
}
|
|
|
|
/// A bxCAN master instance that shares filter banks with a slave instance.
|
|
///
|
|
/// In master-slave-instance setups, this trait should be implemented for the master instance.
|
|
///
|
|
/// # Safety
|
|
///
|
|
/// This trait must only be implemented when there is actually an associated slave instance.
|
|
pub unsafe trait MasterInstance: FilterOwner {}
|
|
|
|
foreach_peripheral!(
|
|
(can, $inst:ident) => {
|
|
impl SealedInstance for peripherals::$inst {
|
|
|
|
fn regs() -> crate::pac::can::Can {
|
|
crate::pac::$inst
|
|
}
|
|
|
|
unsafe fn mut_state() -> & 'static mut State {
|
|
static mut STATE: State = State::new();
|
|
&mut *core::ptr::addr_of_mut!(STATE)
|
|
}
|
|
fn state() -> &'static State {
|
|
unsafe { peripherals::$inst::mut_state() }
|
|
}
|
|
}
|
|
|
|
impl Instance for peripherals::$inst {
|
|
type TXInterrupt = crate::_generated::peripheral_interrupts::$inst::TX;
|
|
type RX0Interrupt = crate::_generated::peripheral_interrupts::$inst::RX0;
|
|
type RX1Interrupt = crate::_generated::peripheral_interrupts::$inst::RX1;
|
|
type SCEInterrupt = crate::_generated::peripheral_interrupts::$inst::SCE;
|
|
}
|
|
};
|
|
);
|
|
|
|
foreach_peripheral!(
|
|
(can, CAN) => {
|
|
unsafe impl FilterOwner for peripherals::CAN {
|
|
const NUM_FILTER_BANKS: u8 = 14;
|
|
}
|
|
};
|
|
// CAN1 and CAN2 is a combination of master and slave instance.
|
|
// CAN1 owns the filter bank and needs to be enabled in order
|
|
// for CAN2 to receive messages.
|
|
(can, CAN1) => {
|
|
cfg_if::cfg_if! {
|
|
if #[cfg(all(
|
|
any(stm32l4, stm32f72, stm32f73),
|
|
not(any(stm32l49, stm32l4a))
|
|
))] {
|
|
// Most L4 devices and some F7 devices use the name "CAN1"
|
|
// even if there is no "CAN2" peripheral.
|
|
unsafe impl FilterOwner for peripherals::CAN1 {
|
|
const NUM_FILTER_BANKS: u8 = 14;
|
|
}
|
|
} else {
|
|
unsafe impl FilterOwner for peripherals::CAN1 {
|
|
const NUM_FILTER_BANKS: u8 = 28;
|
|
}
|
|
unsafe impl MasterInstance for peripherals::CAN1 {}
|
|
}
|
|
}
|
|
};
|
|
(can, CAN3) => {
|
|
unsafe impl FilterOwner for peripherals::CAN3 {
|
|
const NUM_FILTER_BANKS: u8 = 14;
|
|
}
|
|
};
|
|
);
|
|
|
|
pin_trait!(RxPin, Instance);
|
|
pin_trait!(TxPin, Instance);
|
|
|
|
trait Index {
|
|
fn index(&self) -> usize;
|
|
}
|
|
|
|
impl Index for Mailbox {
|
|
fn index(&self) -> usize {
|
|
match self {
|
|
Mailbox::Mailbox0 => 0,
|
|
Mailbox::Mailbox1 => 1,
|
|
Mailbox::Mailbox2 => 2,
|
|
}
|
|
}
|
|
}
|