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160 Commits

Author SHA1 Message Date
Corey Schuhen
32065d7719 BXCAN: Cut out more that wasn't required from BXCAN crate. 2024-03-28 09:32:08 +10:00
Corey Schuhen
fcfcfce400 CAN: Move some FDCAN definitions into a module to share with BXCAN. 2024-03-28 09:30:58 +10:00
Maarten de Vries
c059062627 embassy_stm32: Preseve the RTR flag in messages. 2024-03-27 16:10:37 +01:00
Dario Nieuwenhuis
2bca875b5f stm32: use private_bounds for sealed traits. 2024-03-23 01:38:51 +01:00
Dario Nieuwenhuis
eca9aac194 Fix warnings in recent nightly. 2024-03-20 16:39:09 +01:00
Corey Schuhen
3f5c8784af FDCAN: Fix offset issue preventing CAN2 and CAN3 from working. 
Fix for not H7
 2024-03-16 19:32:38 +10:00
Corey Schuhen
535e4c20e8 Remove unused methods including incorrect #[must_use... 2024-03-14 08:21:45 +10:00
Corey Schuhen
242759a600 Use Result instead of Option for Frame creation. 2024-03-13 17:46:50 +10:00
Corey Schuhen
12a3af5043 Shared frame types. 
Remove BXCAN speciffic id and frame modules

Remove SizedClassicData
 2024-03-13 17:46:50 +10:00
Corey Schuhen
84d21e959d Dummy 2024-03-07 17:45:01 +10:00
Corey Schuhen
98e7a0a423 Remove old PAC from bscan crate. 2024-03-07 17:45:01 +10:00
Corey Schuhen
9ba379fb9e Remove usage of old PAC 
Formatting
 2024-03-07 17:45:01 +10:00
Corey Schuhen
65b38cf755 Fix examples and improve imports required. 2024-03-07 17:45:01 +10:00
Corey Schuhen
a9ff38003b Documentation. 
.
 2024-03-07 17:45:01 +10:00
Corey Schuhen
455cc40261 Port registers access to using Embassy PAC 
Use stm32-metapac for filters module.
 2024-03-07 17:45:01 +10:00
Corey Schuhen
b0f05e7682 Remove unused. 2024-03-07 17:45:01 +10:00
Corey Schuhen
34687a0956 Apply cargo fmt 
Formatting.
 2024-03-07 17:45:01 +10:00
Corey Schuhen
fecb65b988 Make use of internal BXCAN crate work. Tested on stm32f103 with real bus and HIL tests. 
Fix
 2024-03-07 17:45:01 +10:00
Corey Schuhen
f736f1b27f RAW copy of files from BXCAN crate. No changes whatsoever. 2024-03-07 17:45:01 +10:00
Torin Cooper-Bennun
e0018c6f4f stm32: can:fd: merge read impls; buffered RX returns Result<_, BusError> 2024-03-04 12:38:46 +00:00
Torin Cooper-Bennun
72c6cdc5d5 stm32: can: fd: rename TxBufferMode::Queue -> ::Priority for clarity 2024-03-04 12:22:18 +00:00
Corey Schuhen
b693ab9b34 Restore init order to restore H7. 
Previous commit broke H7 support in HIL farm. Restore previous order by moving a bunch of config from new and into_config_mode to apply_config.

This is a cleanup that I had considered to move more register access into peripheral.rs.
 2024-03-02 14:18:12 +10:00
Corey Schuhen
bf06d10534 Delay setting TX buffer mode until user had a chance to configure it. 2024-03-02 14:00:56 +10:00
Torin Cooper-Bennun
9e403fa89a stm32: can: fd: rename abort_pending_mailbox, rm pub qualifier 2024-03-02 10:08:20 +10:00
Torin Cooper-Bennun
befbb2845a stm32: can: fd: write: if in TX FIFO mode & bufs full, then abort 2024-03-02 10:08:20 +10:00
Torin Cooper-Bennun
30606f9782 stm32: can: fd: allow TX buffers in FIFO mode 2024-03-02 10:08:20 +10:00
Corey Schuhen
df8f508ffa Writing to TX buffer also needs to fire an interrupt to kick off transmission if it is idle. 
Formatting
 2024-03-02 09:09:27 +10:00
Siebe Claes
96af20cf5b stm32: can: fd: Fix Frame is_extended() function 2024-03-01 19:21:01 +01:00
Dario Nieuwenhuis
263d1b024c
Merge pull request #2637 from cschuhen/feature/fix_buf_size 
Buffer is not big enough for FD frames.
 2024-02-28 17:33:58 +00:00
eZio Pan
47c579eba2 update metapac 2024-02-29 00:11:40 +08:00
Corey Schuhen
1353a343b8 Buffer is not big enough for FD frames. 2024-02-28 18:03:53 +10:00
Torin Cooper-Bennun
a8da42943f stm32: can: fd: rm some irrelevant commented code and dead code 2024-02-27 23:47:41 +00:00
Torin Cooper-Bennun
0ed402fd79 stm32: can: fd: refactor out some duplicate code 2024-02-27 23:47:25 +00:00
Torin Cooper-Bennun
9a4f58fe15 stm32: can: fd: only TX with BRS if also TXing with FDF 2024-02-27 10:38:40 +00:00
Torin Cooper-Bennun
e63b0d7a2f stm32: can: fd: fix SID read/write from buf elems 2024-02-27 10:38:07 +00:00
Corey Schuhen
a737a7350e FDCAN: Remove history from comments. 2024-02-25 10:14:12 +10:00
Corey Schuhen
1327a644b6 FDCAN: Don't require internal module for public API. 2024-02-25 10:14:12 +10:00
Corey Schuhen
0565098b06 FDCAN: Fix some indenting in macros 2024-02-25 10:14:12 +10:00
Corey Schuhen
a061cf3133 FDCAN: Allow access to buffered senders and receivers. 2024-02-25 10:14:12 +10:00
Corey Schuhen
779898c0e7 FDCAN: Expose some pub types in API 2024-02-25 10:14:12 +10:00
Corey Schuhen
2d634d07e0 FDCAN: Remove extra traits from. 
Comments

Fix.
 2024-02-25 10:13:58 +10:00
Corey Schuhen
eafa90cd07 Remove the OperatingMode typestates 
Instead have two explcit types(without the mode generic arg)types:
- One for config
- One for all operating modes
 2024-02-18 13:09:37 +10:00
Corey Schuhen
5ad291b708 Add a buffered mode. 2024-02-17 18:26:57 +10:00
Corey Schuhen
91c75c92a0 Clean up and prep for buffered IRQ mode. 
- Reduce code duplicaiton in read/write methods
- General clean-up
- Prepare for buffered mode
 2024-02-17 18:26:57 +10:00
Corey Schuhen
5d8c54fdea Move error conversion to peripheral.rs 2024-02-17 18:25:58 +10:00
Corey Schuhen
200ace566f Don't use word Standard for frame format because it can be confused with ID format. Use Classic instead to mean CAN 2.0B frames. 2024-02-17 18:25:58 +10:00
Corey Schuhen
70b3c4374d Port FDCAN HAL to use PAC directly instead of fdcan crate. 
- Provide separate FDCAN capable and Classic CAN API's
- Don't use fdcan crate dep anymore
- Provide embedded-can traits.
 2024-02-17 18:25:58 +10:00
Corey Schuhen
1de78d0490 Initial FDCAN driver implementation. 
Original author:
    Torin Cooper-Bennun <tcbennun@maxiluxsystems.com>

Cleanup and documentaion by:
    Tomasz bla Fortuna <bla@reactor.local>
    Corey Schuhen <cschuhen@gmail.com>

Use new PAC method now that the names are common.

Use broken out definitions that can be shared with bxcan

Populate Rx struct with an embassy timestamp.

Remove use of RefCell.

As per review comment. - THis will probably get squashed down.

Fix
 2024-01-31 05:40:05 +10:00
Tomasz bla Fortuna
03ba45065e Add FDCAN clock registers to G4 RCC. 
Author: Adam Morgan <adam@luci.com>

Break definitions out of bxcan that can be used innm fdcan.

Typo
 2024-01-31 05:40:05 +10:00
eZio Pan
d90a97aa4c update metapac after stm32-data PR323 
and refactor a few code with cargo clippy
 2023-12-25 22:03:32 +08:00