David Lawrence
0bec981882
STM32: bump to latest stm32-metapac
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HRTIM driver is updated per https://github.com/embassy-rs/stm32-data/pull/544
2024-12-06 21:58:18 -05:00
Dániel Buga
306099f9d5
Prepare embassy-usb-synopsys-otg 0.2.0
2024-12-06 13:23:06 +01:00
Dario Nieuwenhuis
4acc0f84b0
Merge pull request #3274 from michelrandahl/discriminating-pins-within-tsc-group
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STM32-TSC: enable discriminating between pins within same TSC group and improve TSC library in general
2024-12-03 01:11:33 +01:00
Enmanuel Parache
8d2fbf0e14
Extend set_baudrate implementation to Buffered and RingBuffered structs
2024-12-03 00:34:23 +01:00
Enmanuel Parache
32a1b232cb
Fixed build error
2024-12-03 00:34:23 +01:00
Enmanuel Parache
63298e2f7c
Reduced code duplication
2024-12-03 00:34:23 +01:00
Enmanuel Parache
def2601558
rustfmt
2024-12-03 00:34:23 +01:00
Enmanuel Parache
6494429a20
stm32/usart: Changing baud rate
2024-12-03 00:34:23 +01:00
Dario Nieuwenhuis
db9ad1c30c
Merge pull request #3549 from aurelj/stm32_pwm_32bits_timer
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stm32/timer: avoid max_compare_value >= u16::MAX
2024-12-02 22:50:09 +00:00
Dario Nieuwenhuis
bc5e0d60b3
Merge pull request #3566 from IvanLi-CN/feat/adc-read-async-stm32g4
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STM32: Implement Asynchronous ADC Reading for G4
2024-12-02 23:38:06 +01:00
Dario Nieuwenhuis
8086fc4dff
Merge pull request #3588 from elagil/fix_sai_write_immediate
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Right-align `write_immediate()` in ring buffers
2024-12-02 22:05:44 +00:00
decaday
18020d672d
fix: error message for multiple time-driver-xxx cargo features
2024-12-02 16:51:50 +08:00
Dario Nieuwenhuis
c73a4d397d
Merge pull request #3595 from Sizurka/stm32-usart-databits
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stm32/usart: Implement data bit selection
2024-12-01 21:39:27 +00:00
Derek Hageman
7d15ec921a
stm32/usart: Implement data bit selection
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Implement data bit size selection and add 7-bit mode.
2024-12-01 11:00:08 -07:00
Dániel Buga
efee03744e
Only recompute allocated alarms
2024-11-30 14:40:12 +01:00
Dániel Buga
fdb8ee2e8a
RTC: Trigger expired alarms
2024-11-30 14:40:12 +01:00
michel
31da5155e8
Refactor TSC module: Remove redundant 'Tsc' prefixes for improved naming consistency
2024-11-29 17:58:35 +01:00
michel
721c6820d4
STM32-TSC: enable discriminating between pins within same TSC group and improve TSC library in general
2024-11-29 17:58:33 +01:00
elagil
5d2b38c979
doc: improve comment
2024-11-28 17:45:00 +01:00
elagil
152d8ee0d9
fix: make write_immediate() for ring buffers right-aligned
2024-11-28 17:39:39 +01:00
Dario Nieuwenhuis
8954c053fb
Merge pull request #3583 from williams-one/add-flash-bank-selection-for-erase
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STM32U5: Add flash bank selection when erasing a sector
2024-11-28 14:15:30 +00:00
eZio Pan
f3e674a79c
stm32: remove redundant time-driver macro
2024-11-28 15:48:27 +08:00
William
b035ff1145
stm32u5: Add flash bank selection when erasing a sector
2024-11-27 17:29:08 +01:00
William
7a9c488996
stm32: Update STM32 data source
2024-11-27 16:52:26 +01:00
Dario Nieuwenhuis
0d5cd7d692
Merge pull request #3582 from itswenb/main
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fix: Add missing clock check
2024-11-27 09:50:34 +00:00
Bing Wen
09c9f64b8e
Add missing clock check
2024-11-27 17:44:03 +08:00
Ulf Lilleengen
8e25bc56f6
Merge pull request #3574 from itswenb/main
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feat: Add new feature to enable overclocking
2024-11-27 07:38:00 +00:00
Bing Wen
b225d73dc5
Change compile condition
2024-11-27 14:00:45 +08:00
Bing Wen
d0340ad297
Fix & Revert
2024-11-27 12:33:32 +08:00
Bing Wen
52ab015fac
Add new
2024-11-27 12:23:13 +08:00
Bing Wen
8eaa3c8fd3
Add new feature to enable overclocking
2024-11-26 12:46:20 +08:00
Dario Nieuwenhuis
37111a891c
Merge pull request #3556 from chrenderle/low-power
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low-power: add support for stm32u0
2024-11-25 14:00:28 +00:00
elagil
20e2da677f
chore: use latest metapac
2024-11-24 22:50:51 +01:00
Dario Nieuwenhuis
aaad8450e9
Use inline const for initializing arrays. ( #3567 )
2024-11-24 20:58:48 +01:00
Dario Nieuwenhuis
032af9d512
otg: fix corruption in CONTROL OUT transfers in stm32f4.
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The RM says we have to process STUP (and therefore clear CNAK to start the data stage)
in the DOEPINT STUP interrupt. Seems doing it in RXFLVL when we receive the data is
too early. This makes it work consistently on all chips, so the quirk is no longer needed.
Fixes #3493
Fixes #3459
2024-11-24 00:32:26 +01:00
Dario Nieuwenhuis
4f459bb918
otg: improve trace logging, print bytes as hex.
2024-11-24 00:32:26 +01:00
Dario Nieuwenhuis
1ca53e286b
otg: fix build with defmt enabled.
2024-11-24 00:32:26 +01:00
Ivan Li
54b39ba492
stm32 adc g4 async read
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Signed-off-by: Ivan Li <ivanli2048@gmail.com>
2024-11-23 12:52:22 +08:00
Dániel Buga
c9abff53d7
Bump sync version ( #3562 )
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* Bump sync version
* Use old embassy-sync in rp bluetooth example
* Downgrade update to minor
2024-11-22 21:16:11 +01:00
Christian Enderle
1fbb419f72
low-power: add support for stop for stm32u0
2024-11-22 10:37:12 +01:00
Christian Enderle
a49289ce7b
low-power: add basic support for stm32u0
2024-11-22 10:37:12 +01:00
Christian Enderle
29934237a5
rtc: reorganize low-power SealedInstance
2024-11-22 10:37:12 +01:00
Christian Enderle
48fd80919a
rcc: enable lse for stm32u0
2024-11-22 10:37:12 +01:00
Gabriel Smith
bd65906d14
STM32H5xx ADC ( #3557 )
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* stm32: Update STM32 data source
* stm32h5: Add ADC example
2024-11-21 23:23:46 +01:00
Christian Enderle
f598cae376
compute lse and lsi frequency for STM32L and STM32U0 series
2024-11-21 12:12:00 +01:00
Dario Nieuwenhuis
66756af2f0
Merge pull request #3547 from bugadani/callback
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Executor: Only set callback once
2024-11-20 23:14:02 +00:00
Aurélien Jacobs
3402e76f98
stm32/timer: avoid max_compare_value >= u16::MAX
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With STM32 32 bits timers, the max_compare_value (AKA, ARR register)
can currently be set greater than u16::MAX, which leads to the following
assert!(max < u16::MAX as u32) in max_duty_cycle() when setting up a 1 kHz
SimplePwm on 84 MHz MCU.
The issue is fixed by forcing a max_compare_value that fits into 16 bits
when setting the frequency for a PWM.
2024-11-20 16:21:20 +01:00
Dániel Buga
8ebe059ecb
Add initialize
2024-11-19 16:25:17 +01:00
elagil
de7fae1822
fix: enable backup symbol clock
2024-11-18 20:51:23 +01:00
elagil
62dbdcd45a
feat: add SPDIFRX driver
2024-11-18 20:51:22 +01:00
