Bob McWhirter
|
f01ddd5f5c
|
Mix dmamux into bdma_v1.
|
2021-07-13 10:09:35 -04:00 |
|
Bob McWhirter
|
6ec7253095
|
Checkpoint my DMA for thales.
|
2021-07-13 10:08:43 -04:00 |
|
Bob McWhirter
|
acdf7f4f13
|
Another checkpoint.
|
2021-07-13 10:08:43 -04:00 |
|
Bob McWhirter
|
31325a2547
|
Another checkpoint.
|
2021-07-13 10:08:43 -04:00 |
|
Bob McWhirter
|
043f0ea508
|
Checkpoint DMAMUX channel setup.
|
2021-07-13 10:08:43 -04:00 |
|
Thales Fragoso
|
91521a86a0
|
F0: usart + DMA working
|
2021-07-13 10:08:43 -04:00 |
|
Thales Fragoso
|
a56ddfdc04
|
STM: Add usart v2
|
2021-07-13 10:08:43 -04:00 |
|
Thales Fragoso
|
f32caaeaaf
|
STM: Start working on bdma-v1
|
2021-07-13 10:08:43 -04:00 |
|
Liam Murphy
|
ff9ff5e43a
|
Update the import
|
2021-07-05 18:31:54 +10:00 |
|
Liam Murphy
|
fc1ef4947d
|
Fix stm32 ethernet
|
2021-07-05 18:18:05 +10:00 |
|
Dario Nieuwenhuis
|
ecc151d4e2
|
stm32/adc: simplify delay handling
|
2021-07-05 03:18:23 +02:00 |
|
Rukai
|
25d4b2ea26
|
fix stm32 warnings
|
2021-07-05 01:54:29 +02:00 |
|
Thales Fragoso
|
c2f595b26a
|
F0: Fix missing apb2 clock
|
2021-07-03 02:12:22 -03:00 |
|
Bob McWhirter
|
f5ce807e25
|
Let's adjust i2c the correct way, removing the correct APBesque frequency, not the i2c periph speed.
|
2021-07-02 13:54:07 -04:00 |
|
Bob McWhirter
|
9f5d35d891
|
Remove the frequency argument for i2c, move to using RccPeripheral.
|
2021-07-01 13:53:57 -04:00 |
|
Bob McWhirter
|
8f94123ca4
|
argh, intellij.
|
2021-07-01 11:37:01 -04:00 |
|
Bob McWhirter
|
0920c0cb1d
|
Make UART pins Rx/Tx/etc in addition to USART.
|
2021-07-01 11:30:54 -04:00 |
|
Bob McWhirter
|
54ada5bae1
|
Stub in the DMA bits that aren't yet there.
|
2021-07-01 11:30:54 -04:00 |
|
Bob McWhirter
|
bf3bc92525
|
Re-enable because intellij.
|
2021-07-01 11:30:54 -04:00 |
|
Bob McWhirter
|
497d3aa153
|
Add USARTv3 support.
|
2021-07-01 11:30:54 -04:00 |
|
Thales Fragoso
|
e07dda8707
|
stm32: Adjust some fences around DMA
Also bump stm32-data
|
2021-06-30 18:58:21 -03:00 |
|
Bob McWhirter
|
f3b9c97763
|
Change atomics and add a fence.
|
2021-06-30 10:17:25 -04:00 |
|
Bob McWhirter
|
cf5b7dc943
|
Because IntelliJ makes life hard.
|
2021-06-30 10:03:18 -04:00 |
|
Bob McWhirter
|
6a0b0f3162
|
Enable RCC within the USART itself.
|
2021-06-30 09:57:27 -04:00 |
|
Bob McWhirter
|
07a6686879
|
Protect DMA-related things with cfg.
|
2021-06-29 13:00:52 -04:00 |
|
Bob McWhirter
|
6b78d56ceb
|
Formatting.
|
2021-06-29 12:48:58 -04:00 |
|
Bob McWhirter
|
c53ab325c1
|
Wire up DMA with USART v1.
|
2021-06-29 11:01:57 -04:00 |
|
Bob McWhirter
|
b88fc2847a
|
Checkpoint with lifetime issues.
|
2021-06-29 11:01:57 -04:00 |
|
Thales Fragoso
|
c5022b1196
|
stm32: Make sure Output gpio driver is pushpull
|
2021-06-27 13:25:35 -03:00 |
|
Thales Fragoso
|
0eaadfc125
|
stm32: Update gpio examples
|
2021-06-25 18:16:43 -03:00 |
|
Thales Fragoso
|
a3f0aa02a4
|
Separate OpenDrain pin to a new type
|
2021-06-25 17:22:51 -03:00 |
|
Thales Fragoso
|
efb3b3a0a8
|
stm32: Allow for open drain configuration for output pin
|
2021-06-24 20:42:43 -03:00 |
|
Thales Fragoso
|
013792b944
|
Separate exti into v1 and v2
|
2021-06-24 20:28:06 -03:00 |
|
Thales Fragoso
|
1c33a3b94c
|
#[cfg] exti
|
2021-06-24 19:41:04 -03:00 |
|
Thales Fragoso
|
409884be2a
|
Add F0 RCC
|
2021-06-24 19:21:56 -03:00 |
|
Dario Nieuwenhuis
|
5a4e3ceb88
|
Update stm32-data (adds DBGMCU to all chips)
|
2021-06-21 01:38:59 +02:00 |
|
Thales Fragoso
|
598201bff3
|
eth-v2: Make embassy-net optional
|
2021-06-16 16:48:35 +02:00 |
|
Thales Fragoso
|
6cecc6d4b5
|
eth-v2: Get hclk frequency from clock singleton
|
2021-06-16 16:48:35 +02:00 |
|
Thales Fragoso
|
f7e1f262af
|
eth-v2: Enable source address filtering
|
2021-06-16 16:48:35 +02:00 |
|
Thales Fragoso
|
ffc19a54d6
|
eth-v2: Fix bug in Rx descriptors and add docs art
|
2021-06-16 16:48:35 +02:00 |
|
Thales Fragoso
|
6daa55a897
|
eth-v2: Fix setting the registers for the descriptors
Also, the interrupts are set to 1 to clear, the manual could have helped
with that one...
|
2021-06-16 16:48:35 +02:00 |
|
Thales Fragoso
|
0b42e12604
|
eth-v2: Fix off by one bug
|
2021-06-16 16:48:35 +02:00 |
|
Thales Fragoso
|
54ad2a41f1
|
eth-v2: Work around missing AF for REF_CLK
|
2021-06-16 16:48:35 +02:00 |
|
Thales Fragoso
|
0c837f07c0
|
eth-v2: Enable clocks in new
|
2021-06-16 16:48:35 +02:00 |
|
Thales Fragoso
|
e039c7c42c
|
eth-v2: Remove Instance trait
|
2021-06-16 16:48:35 +02:00 |
|
Thales Fragoso
|
05a239faf6
|
eth-v2: Implement embassy-net's Device Trait and fix Drop
|
2021-06-16 16:48:35 +02:00 |
|
Thales Fragoso
|
4cffa200bd
|
eth: Add lan8742a PHY
|
2021-06-16 16:48:35 +02:00 |
|
Thales Fragoso
|
46e1bae9e3
|
eth-v2: Start Ethernet peripheral implementation
|
2021-06-16 16:48:35 +02:00 |
|
Ulf Lilleengen
|
56c5218292
|
Prescaler 1 means divide by 3 on WL55
|
2021-06-16 16:21:16 +02:00 |
|
Ulf Lilleengen
|
383beb37b3
|
Rename from wl55 to wl5x and enable debug wfe
|
2021-06-16 16:07:21 +02:00 |
|