Markus Kasten
|
b40d30f0ac
|
tests/stm32: fix test for g0 hsi sys_div
|
2025-01-17 12:36:38 +01:00 |
|
Dion Dokter
|
e322732fdb
|
Add H7 dual core to common and run fmt
|
2024-08-05 15:13:11 +02:00 |
|
Dion Dokter
|
3cd2081450
|
Fix tests
|
2024-08-05 15:07:51 +02:00 |
|
Dario Nieuwenhuis
|
7089e5b586
|
stm32/tests: add stm32u0 hil.
|
2024-05-13 16:20:52 +02:00 |
|
Dario Nieuwenhuis
|
fb67fe0a6c
|
stm32: add support for STM32H7[RS] "bootflash line", add HIL tests.
|
2024-05-01 02:24:45 +02:00 |
|
Dario Nieuwenhuis
|
6f44d7a9df
|
stm32: update metapac. Adds U5 LPDMA, fixes ADC_COMMONs.
|
2024-04-29 20:52:27 +02:00 |
|
Emilie Burgun
|
402def86ee
|
Remove ad-hoc fixes for setting the IOSV bit to true
|
2024-03-26 17:27:02 +01:00 |
|
Caleb Garrett
|
1ec9fc58f4
|
Add async CRYP to test.
|
2024-03-12 14:52:34 -04:00 |
|
Dario Nieuwenhuis
|
ae266f3bf5
|
stm32/rcc: port c0 to new api. Add c0 HSIKER/HSISYS support.
|
2024-03-04 00:08:14 +01:00 |
|
Dario Nieuwenhuis
|
c8c4b0b701
|
stm32/rcc: port g0 to new api.
|
2024-03-04 00:04:06 +01:00 |
|
Dario Nieuwenhuis
|
b4567bb8c5
|
stm32/rcc: g4: consistent PllSource, add pll pqr limits, simplify a bit.
|
2024-03-04 00:04:06 +01:00 |
|
Dario Nieuwenhuis
|
95234cddba
|
stm32: autogenerate mux config for all chips.
|
2024-03-01 23:54:37 +01:00 |
|
Dario Nieuwenhuis
|
489d0be2a2
|
stm32/rcc: unify naming sysclk field to sys, enum to Sysclk.
|
2024-02-26 00:00:17 +01:00 |
|
Dario Nieuwenhuis
|
0665e0d452
|
stm32/rcc: port U5 to new API, add all PLLs, all HSE modes.
|
2024-02-23 01:24:05 +01:00 |
|
Dario Nieuwenhuis
|
0e80dc4cd9
|
tests/stm32: add stm32f091rc, stm32h503rb.
|
2024-02-17 02:36:48 +01:00 |
|
Dario Nieuwenhuis
|
b7c147445a
|
stm32/rcc: port F1 to new API.
|
2024-02-13 01:21:51 +01:00 |
|
Dario Nieuwenhuis
|
0dc5e6d3e4
|
stm32/rcc: port F3 RCC to new API
See #2515
|
2024-02-12 02:19:31 +01:00 |
|
Dario Nieuwenhuis
|
7696b1c0b8
|
tests/stm32: fix h7 wrong smps config.
|
2024-01-20 01:52:21 +01:00 |
|
Dario Nieuwenhuis
|
fe218ed978
|
tests/stm32: add L1 DAC/ADC test.
|
2023-12-08 20:24:15 +01:00 |
|
Dario Nieuwenhuis
|
cf13f70ea9
|
stm32/test: add stm32f446 (board not in HIL rig yet)
|
2023-11-27 00:38:57 +01:00 |
|
Dario Nieuwenhuis
|
ace5221080
|
stm32/rcc: unify f2 into f4/f7.
|
2023-11-13 01:59:33 +01:00 |
|
Dario Nieuwenhuis
|
2376b3bdfa
|
stm32/rcc: fix pll enum naming on f4, f7.
|
2023-11-13 01:56:50 +01:00 |
|
Dario Nieuwenhuis
|
066dc297ed
|
stm32/rcc: unify l0l1 and l4l5.
|
2023-11-13 01:05:07 +01:00 |
|
Dario Nieuwenhuis
|
4fe344ebc0
|
stm32/rcc: consistent casing and naming for PLL enums.
|
2023-11-13 00:52:01 +01:00 |
|
Dario Nieuwenhuis
|
0272deb158
|
stm32/rcc: add shared code for hsi48 with crs support.
|
2023-11-05 23:52:54 +01:00 |
|
Dario Nieuwenhuis
|
8911a4d855
|
stm32/rcc: switch to modern api for l0, l1.
|
2023-11-05 03:06:13 +01:00 |
|
Dario Nieuwenhuis
|
a39ae12edc
|
stm32/rcc: misc cleanups.
|
2023-10-23 17:36:21 +02:00 |
|
Dario Nieuwenhuis
|
0ef1cb29f7
|
stm32/rcc: merge wb into l4/l5.
|
2023-10-23 17:36:21 +02:00 |
|
Dario Nieuwenhuis
|
b9e13cb5d1
|
stm32/rcc: merge wl into l4/l5.
|
2023-10-23 00:31:36 +02:00 |
|
Dario Nieuwenhuis
|
a84ad741a4
|
stm32/tests: add stm32wba52cg, stm32u5a9zj
|
2023-10-22 22:45:11 +02:00 |
|
Dario Nieuwenhuis
|
412bcad2d1
|
stm32: rename HSI16 -> HSI
|
2023-10-22 22:39:55 +02:00 |
|
Dario Nieuwenhuis
|
62e1e1637c
|
Merge pull request #2097 from embassy-rs/rcc-no-spaghetti
stm32/tests: add stm32h753zi, stm32h7a3zi.
|
2023-10-21 02:49:12 +00:00 |
|
Dario Nieuwenhuis
|
3d03c18d4f
|
stm32/tests: add stm32h753zi, stm32h7a3zi.
|
2023-10-21 04:46:45 +02:00 |
|
xoviat
|
0fb677aad7
|
stm32: update metapac
|
2023-10-20 20:21:53 -05:00 |
|
Dario Nieuwenhuis
|
f20f170b1f
|
stm32/rcc: refactor and unify f4 into f7.
|
2023-10-18 05:11:31 +02:00 |
|
Dario Nieuwenhuis
|
67010d123c
|
stm32/rcc: refactor f7.
|
2023-10-18 05:01:11 +02:00 |
|
xoviat
|
bbd12c9372
|
stm32: update metapac
|
2023-10-17 20:31:44 -05:00 |
|
Dario Nieuwenhuis
|
846f2fc6e4
|
stm32/tests: add stm32wl hil.
|
2023-10-17 15:57:09 +02:00 |
|
xoviat
|
a3574e519a
|
stm32: update metapac
|
2023-10-16 20:04:10 -05:00 |
|
Dario Nieuwenhuis
|
18e96898ea
|
stm32/rcc: unify L4 and L5.
|
2023-10-16 04:00:51 +02:00 |
|
Dario Nieuwenhuis
|
5c5e681819
|
stm32/rcc: add better support for L4/L4+ differences.
|
2023-10-16 03:23:43 +02:00 |
|
Dario Nieuwenhuis
|
8a10948ce9
|
stm32/rcc: port L4 to the "flattened" API like h5/h7.
|
2023-10-15 03:08:49 +02:00 |
|
Dario Nieuwenhuis
|
21915a9a3f
|
stm32/rcc: unify L0 and L1.
|
2023-10-11 01:22:27 +02:00 |
|
Dario Nieuwenhuis
|
0cfa8d1bb5
|
stm32/rcc: use more PLL etc enums from PAC.
|
2023-10-11 00:12:33 +02:00 |
|
Dario Nieuwenhuis
|
6186fe0807
|
stm32/rcc: use PLL enums from PAC.
|
2023-10-09 02:48:22 +02:00 |
|
Dario Nieuwenhuis
|
c0a6c78a14
|
stm32/hil: add f2, f3, f7, l49
|
2023-10-03 02:11:58 +02:00 |
|
Dario Nieuwenhuis
|
eff61648fe
|
tests/stm32: add eth test.
|
2023-10-02 20:40:11 +02:00 |
|
Dario Nieuwenhuis
|
8b5fb254c0
|
tests/stm32: add L0, L1, L4, L4+, L5
|
2023-09-26 05:30:50 +02:00 |
|
Dario Nieuwenhuis
|
4b695120fc
|
tests/stm32: centralize pin configuration.
|
2023-09-25 22:41:22 +02:00 |
|
Dario Nieuwenhuis
|
83b4c01273
|
stm32/rcc: unify h5 and h7.
|
2023-09-21 23:47:56 +02:00 |
|