Dario Nieuwenhuis
0591d60a79
stm32/otg: calculate TRDT using AHB freq instead of kernel freq.
2025-04-30 18:11:20 +02:00
Josep Angel Oltra
69d2ce4eab
Added USB core_id 0x1000 for STM32
2025-04-17 22:57:13 +02:00
Dario Nieuwenhuis
d41eeeae79
Remove Peripheral trait, rename PeripheralRef->Peri.
2025-03-27 15:18:06 +01:00
elagil
15394ae5fa
fix(usb): blocking wait
2025-03-24 19:49:44 +01:00
elagil
e34b4d69ee
fix: build
2025-03-22 11:58:50 +01:00
elagil
07387ea405
fix: apply STM32H5 USB errata (OUT transfer delay)
2025-03-22 11:47:36 +01:00
Dario Nieuwenhuis
86572bf009
Merge pull request #3964 from elagil/sof_out_usb
...
Add optional USB driver SOF output
2025-03-16 21:10:27 +00:00
elagil
63f7a5da09
fix: disable new_with_sof for STM32L1
2025-03-16 22:02:43 +01:00
elagil
cecbe082ff
fix: only ISO EP is always double buffered
2025-03-16 16:34:09 +01:00
elagil
0ff6184723
refactor: fix build warnings
2025-03-15 20:28:23 +01:00
elagil
8fef488738
refactor: USB read function restructure
2025-03-15 20:24:14 +01:00
elagil
0b468ef29c
fix: iso out order
2025-03-15 20:16:32 +01:00
elagil
0b6b0756ed
fix: USB ISO IN EP stat
2025-03-15 13:46:20 +01:00
elagil
f1db070f78
feat: add optional USB SOF output
2025-03-12 23:18:34 +01:00
Volkalex28
fb1368d9c8
Fix unsupported trace! call for EndpointAddress
2025-01-09 11:02:47 +02:00
Fabian Wolter
306a781267
STM32: set USB initialization delay to 1µs
2024-12-30 20:46:56 +01:00
Marvin Drees
a0e056a629
Update STM32U5 OTG HS clock handling
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Signed-off-by: Marvin Drees <marvin.drees@9elements.com>
2024-12-10 13:10:06 +01:00
Dave Marples
501d3942e8
Add support for stm32u595/5a5 OTG_HS in client mode
2024-12-10 10:51:28 +01:00
Dario Nieuwenhuis
aaad8450e9
Use inline const for initializing arrays. ( #3567 )
2024-11-24 20:58:48 +01:00
Dario Nieuwenhuis
032af9d512
otg: fix corruption in CONTROL OUT transfers in stm32f4.
...
The RM says we have to process STUP (and therefore clear CNAK to start the data stage)
in the DOEPINT STUP interrupt. Seems doing it in RXFLVL when we receive the data is
too early. This makes it work consistently on all chips, so the quirk is no longer needed.
Fixes #3493
Fixes #3459
2024-11-24 00:32:26 +01:00
Dario Nieuwenhuis
4f459bb918
otg: improve trace logging, print bytes as hex.
2024-11-24 00:32:26 +01:00
Kevin
6d9af8304c
Add USBPHYC clock configuration for H7RS series
2024-09-22 00:23:07 +02:00
Kevin
2f60d78ea3
Add OTG_HS support for STM32H7R/S
2024-09-22 00:23:07 +02:00
elagil
ccf68d7391
feat(usb): add support for ISO endpoints
2024-09-05 21:29:04 +02:00
Ulf Lilleengen
1cfd5370ac
Merge pull request #3281 from elagil/ulpi_add_fs_support
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feat: Add support for a full-speed ULPI mode
2024-08-25 06:05:41 +00:00
elagil
557cff7085
feat: Add support for a full-speed ULPI mode
2024-08-24 20:23:10 +02:00
Dion Dokter
6db0daf79b
Fix errors
2024-07-09 09:53:01 +02:00
Jan Špaček
94007ce6e0
stm32/gpio: refactor AfType
2024-06-16 21:11:55 +02:00
Jan Špaček
368893c9cb
Emit cargo:rustc-check-cfg instructions from build.rs
2024-05-30 18:28:29 +02:00
Jan Špaček
081afca3f0
stm32/rcc: replace generated enable/disable code with runtime info
2024-05-25 18:44:55 +02:00
Dario Nieuwenhuis
fb67fe0a6c
stm32: add support for STM32H7[RS] "bootflash line", add HIL tests.
2024-05-01 02:24:45 +02:00
Dániel Buga
887d7e1430
Configure MAX_EP_COUNT via const generics
2024-04-27 18:01:45 +02:00
Dániel Buga
bc0408dc4b
Remove extra disable call
2024-04-26 22:16:45 +02:00
Dániel Buga
7ce2594eb7
Reset inited flag to allow re-enabling
2024-04-26 18:18:08 +02:00
Dániel Buga
50aefb4174
Hide the Dir trait
2024-04-26 18:13:15 +02:00
Dániel Buga
91c42e0b9e
Extract synopsys otg driver
2024-04-26 17:58:23 +02:00
Joël Schulz-Ansres
152d514f52
Fix spelling in vbus_detection doc comment
2024-04-22 00:39:59 +02:00
Dario Nieuwenhuis
bab4affe7c
Merge pull request #2813 from diondokter/u0-dion
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More U0 support
2024-04-16 18:45:09 +00:00
Dario Nieuwenhuis
2bd5095991
stm32/usb: enable USV for U0.
2024-04-16 20:37:42 +02:00
James Munns
2315a39293
Remove nested CS
2024-04-16 13:39:00 +02:00
James Munns
75352d181c
Add critical sections to avoid USB OTG Errata
2024-04-16 12:07:40 +02:00
Dion Dokter
5f23e39052
Add some examples.
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- usart works
- dac works
- rng gets stuck on while loop
- usb_serial works, but cannot test due to lack of user usb port
- adc needs work and does not work yet
2024-04-13 18:40:46 +02:00
Dario Nieuwenhuis
499c6e84a3
stm32/otg: fix OTG_HS in FS mode.
2024-04-12 03:33:20 +02:00
Boris Faure
98b4eb4491
stm32: fix typo in doc
2024-04-11 22:51:34 +02:00
Dario Nieuwenhuis
2bca875b5f
stm32: use private_bounds for sealed traits.
2024-03-23 01:38:51 +01:00
Dario Nieuwenhuis
eca9aac194
Fix warnings in recent nightly.
2024-03-20 16:39:09 +01:00
Dario Nieuwenhuis
d90abb8ac9
stm32/usb: assert usb clock is okay.
2024-03-19 22:10:59 +01:00
Dario Nieuwenhuis
daa64bd540
stm32/usb: extract common init code.
2024-03-19 22:10:59 +01:00
Dario Nieuwenhuis
530ff9d4d3
stm32/usb: merge usb and usb_otg into single module.
2024-03-19 22:07:16 +01:00
Joonas Javanainen
9b2d096f4f
USB needs PWR_CR2 USV set on STM32L4
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Confirmed to be needed on an STM32L422, and based on a quick look at
L4/L4+ reference manuals, this bit is present and required to be set on
all L4 chips that have some kind of USB peripheral (USB or OTG_FS).
The `usb_otg` driver already sets it for `cfg(stm32l4)` and we should do
the same thing here.
2024-02-20 21:47:13 +02:00
