Maarten de Vries
807e573994
embassy_stm32: allow scheduling lower priority frames in bxcan driver
2024-05-27 16:10:08 +02:00
Maarten de Vries
854ae5da8f
embassy_stm32: implement optional FIFO scheduling for outgoing frames
2024-05-27 16:10:08 +02:00
Dario Nieuwenhuis
fb67fe0a6c
stm32: add support for STM32H7[RS] "bootflash line", add HIL tests.
2024-05-01 02:24:45 +02:00
Dario Nieuwenhuis
1de44e7086
Merge pull request #2840 from MaxiluxSystems/feature/fdcan-runtime-cfg
...
stm32: can: fd: Properties for common runtime get/set operations
2024-04-23 13:46:09 +00:00
Torin Cooper-Bennun
e15fd5895f
stm32: can: fd: Properties: simplify reg accesses
2024-04-23 12:46:42 +01:00
Torin Cooper-Bennun
521c132e34
stm32: can: fd: introduce BusErrorMode with docs and Properties getter
2024-04-23 12:34:17 +01:00
Torin Cooper-Bennun
6ca7e0feab
stm32: can: fd: fix a couple doc comments
2024-04-23 12:34:02 +01:00
Eric Yanush
5c56aff9c2
rustfmt fixes
2024-04-22 14:05:28 -06:00
Eric Yanush
e65503e255
Add sleep/wakeup handling for bxCAN peripherals
2024-04-22 14:04:39 -06:00
Eric Yanush
3e00c1ac52
rustfmt whitespace fixes
2024-04-22 14:01:48 -06:00
Torin Cooper-Bennun
263071d016
stm32: can: fd: Properties: rm &mut refs; make !Sync; rename getters
2024-04-22 13:14:32 +01:00
Torin Cooper-Bennun
7f55a28a50
stm32: can: fd: Properties for common runtime get/set operations
2024-04-22 13:14:32 +01:00
Eric Yanush
68a4fd8f4a
Enable LEC interrupt as well
2024-04-22 01:52:10 -06:00
Eric Yanush
6e1290b3f1
Ensure bus errors are forwarded only once, enable bus off/passive/warning interrupts
2024-04-22 01:46:24 -06:00
Torin Cooper-Bennun
80b3db4ea6
stm32: can: fd: implement bus-off recovery
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as per RM0492 and other relevant RMs, bus-off recovery is not automatic.
CCCR.INIT is set by the device upon bus-off; the CPU must reset
CCCR.INIT to initiate the recovery.
2024-04-17 14:58:08 +01:00
Torin Cooper-Bennun
901bdfc7b8
stm32: can: fd: on_interrupt: simplify, rm redundant code
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PED, PEA are never enabled in the interrupt enable code in
peripheral.rs; no need to process the flags here
2024-04-17 14:57:58 +01:00
Dario Nieuwenhuis
c8936edb6c
stm32/can: simplify bxcan api, merging bx::* into the main structs.
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The bx::* separate structs (Can, Rx, Tx) and separate `Instance` trait
are a relic from the `bxcan` crate. Remove them, move the functionality
into the main structs.
2024-04-02 11:08:03 +02:00
Corey Schuhen
25618cd93d
RTR fix.
2024-03-28 09:53:30 +10:00
Corey Schuhen
a9f0c8c3a9
Fixes for no-time.
2024-03-28 09:32:13 +10:00
Corey Schuhen
2217b80278
CAN: Unify API's between BXCAN and FDCAN. Use Envelope for all read methods instead of a tuple sometimes.
2024-03-28 09:32:13 +10:00
Corey Schuhen
f5daa50a7b
BXCAN: Add struct that combines Buffered RX and Buffered TX.
2024-03-28 09:32:13 +10:00
Corey Schuhen
41b7e4a434
BXCAN: Create TxMode in order to support buffered TX.
2024-03-28 09:32:13 +10:00
Corey Schuhen
26c739c2f9
BXCAN: Create RxMode enum and move reader methods into it, laying foundations for different Rx buffering modes.
2024-03-28 09:32:13 +10:00
Corey Schuhen
3bdaad39e8
BXCAN: Register access into new Registers struct.
2024-03-28 09:32:13 +10:00
Corey Schuhen
32065d7719
BXCAN: Cut out more that wasn't required from BXCAN crate.
2024-03-28 09:32:08 +10:00
Corey Schuhen
fcfcfce400
CAN: Move some FDCAN definitions into a module to share with BXCAN.
2024-03-28 09:30:58 +10:00
Maarten de Vries
c059062627
embassy_stm32: Preseve the RTR flag in messages.
2024-03-27 16:10:37 +01:00
Dario Nieuwenhuis
2bca875b5f
stm32: use private_bounds for sealed traits.
2024-03-23 01:38:51 +01:00
Dario Nieuwenhuis
eca9aac194
Fix warnings in recent nightly.
2024-03-20 16:39:09 +01:00
Corey Schuhen
3f5c8784af
FDCAN: Fix offset issue preventing CAN2 and CAN3 from working.
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Fix for not H7
2024-03-16 19:32:38 +10:00
Corey Schuhen
535e4c20e8
Remove unused methods including incorrect #[must_use...
2024-03-14 08:21:45 +10:00
Corey Schuhen
242759a600
Use Result instead of Option for Frame creation.
2024-03-13 17:46:50 +10:00
Corey Schuhen
12a3af5043
Shared frame types.
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Remove BXCAN speciffic id and frame modules
Remove SizedClassicData
2024-03-13 17:46:50 +10:00
Corey Schuhen
84d21e959d
Dummy
2024-03-07 17:45:01 +10:00
Corey Schuhen
98e7a0a423
Remove old PAC from bscan crate.
2024-03-07 17:45:01 +10:00
Corey Schuhen
9ba379fb9e
Remove usage of old PAC
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Formatting
2024-03-07 17:45:01 +10:00
Corey Schuhen
65b38cf755
Fix examples and improve imports required.
2024-03-07 17:45:01 +10:00
Corey Schuhen
a9ff38003b
Documentation.
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.
2024-03-07 17:45:01 +10:00
Corey Schuhen
455cc40261
Port registers access to using Embassy PAC
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Use stm32-metapac for filters module.
2024-03-07 17:45:01 +10:00
Corey Schuhen
b0f05e7682
Remove unused.
2024-03-07 17:45:01 +10:00
Corey Schuhen
34687a0956
Apply cargo fmt
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Formatting.
2024-03-07 17:45:01 +10:00
Corey Schuhen
fecb65b988
Make use of internal BXCAN crate work. Tested on stm32f103 with real bus and HIL tests.
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Fix
2024-03-07 17:45:01 +10:00
Corey Schuhen
f736f1b27f
RAW copy of files from BXCAN crate. No changes whatsoever.
2024-03-07 17:45:01 +10:00
Torin Cooper-Bennun
e0018c6f4f
stm32: can:fd: merge read impls; buffered RX returns Result<_, BusError>
2024-03-04 12:38:46 +00:00
Torin Cooper-Bennun
72c6cdc5d5
stm32: can: fd: rename TxBufferMode::Queue -> ::Priority for clarity
2024-03-04 12:22:18 +00:00
Corey Schuhen
b693ab9b34
Restore init order to restore H7.
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Previous commit broke H7 support in HIL farm. Restore previous order by moving a bunch of config from new and into_config_mode to apply_config.
This is a cleanup that I had considered to move more register access into peripheral.rs.
2024-03-02 14:18:12 +10:00
Corey Schuhen
bf06d10534
Delay setting TX buffer mode until user had a chance to configure it.
2024-03-02 14:00:56 +10:00
Torin Cooper-Bennun
9e403fa89a
stm32: can: fd: rename abort_pending_mailbox, rm pub qualifier
2024-03-02 10:08:20 +10:00
Torin Cooper-Bennun
befbb2845a
stm32: can: fd: write: if in TX FIFO mode & bufs full, then abort
2024-03-02 10:08:20 +10:00
Torin Cooper-Bennun
30606f9782
stm32: can: fd: allow TX buffers in FIFO mode
2024-03-02 10:08:20 +10:00
