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62 Commits

Author SHA1 Message Date
Dario Nieuwenhuis
2a349afea7 stm32: add stm32c0 support. 2023-01-17 21:28:16 +01:00
Dario Nieuwenhuis
67edea4168 Update to critical-section 1.0, atomic-polyfill 1.0 2022-08-17 19:01:56 +02:00
Dario Nieuwenhuis
42bc510eff Remove STM32L485 "ghost chips" 2022-06-27 02:47:15 +02:00
Dario Nieuwenhuis
88e36a70bd
Update to 2021 edition. (#820) 2022-06-18 02:15:48 +02:00
Dario Nieuwenhuis
a8703b7598 Run rustfmt. 2022-06-12 22:22:31 +02:00
Ulf Lilleengen
da61611f8f Add bootloader to CI 2022-04-27 15:17:18 +02:00
Dario Nieuwenhuis
009bb8e4e1 stm32: add stm32u5 GPDMA, SPIv4 support, add HIL tests. 2022-04-27 01:16:14 +02:00
Nikita Strygin
58948051e5 Convert chip name to upper case to fix rebuilds 
PR #665 made stm32-metapac rebuild when the chip definition was changed.
Though it used the lowercase version of the chip name as a filename
which probably worked fine on windows with its case-independent
filesystem, but was causing constant rebuilds on linux
 2022-03-28 18:44:17 +03:00
bors[bot]
01f8aa19a5
Merge #667 
667: Remove duplicate stm32-metapac/src/common.rs with chiptool r=Dirbaio a=nviennot

There's a duplicate file common.rs with the chiptool crate. This PR makes the source of truth the one in chiptool.

This PR is a good pair with https://github.com/embassy-rs/chiptool/pull/4 

Co-authored-by: Nicolas Viennot <nicolas@viennot.biz>
 2022-03-15 20:54:12 +00:00
Nicolas Viennot
cfa7f4e55b Remove duplicate stm32-metapac/src/common.rs with chiptool 2022-03-15 04:17:55 -04:00
Nicolas Viennot
680ed11038 Rebuild when the chip definition changes 2022-03-15 03:29:13 -04:00
Dario Nieuwenhuis
44096358a2 docs: add metadata.embassy_docs to cargo tomls. 2022-03-04 18:03:41 +01:00
Dario Nieuwenhuis
7b2a255872 stm32-metapac: add doc(html_no_source). 
The source files are unreadable because they're not fmt'd, and
they take up a LOT of space when generating docs for all 1200 chips
because they don't deduplicate.
 2022-03-04 18:03:41 +01:00
Dario Nieuwenhuis
451bb48464 stm32-metapac: remove all macrotables, deduplicate metadata files. 2022-02-26 03:23:09 +01:00
Dario Nieuwenhuis
4d73d87b40 stm32-metapac: add option to generate chip metadata as a rust const. 2022-02-09 00:28:05 +01:00
Dario Nieuwenhuis
167af01211 stm32-metapac: remove stm32gbk 2022-01-13 18:22:29 +01:00
Dario Nieuwenhuis
78d109f5d5 stm32-metapac: add pac feature to allow building only the macrotables. 2021-11-24 01:04:23 +01:00
Dario Nieuwenhuis
dfb6d407a1 stm32: rename core features from _cmX to -cmX, cleanup gen. 2021-11-23 23:49:06 +01:00
Bob McWhirter
f12b70535b Adjust for STM32U5. 2021-11-02 12:05:24 -04:00
Ulf Lilleengen
c79485c286 Support for STM32L1 
* Add RCC
* Fix more issues with dash in chip names
* Update stm32-data version
* Add blinky and spi example
 2021-09-21 14:50:23 +02:00
Dario Nieuwenhuis
d6faf69e09
Merge pull request #378 from numero-744/gen-features-using-rust-not-python 
Use our beloved Rust instead of Python
 2021-09-13 16:47:01 +02:00
Côme ALLART
99ccf18160 fix(gen-features): keep data files order 2021-09-11 20:04:57 +02:00
Dario Nieuwenhuis
f2623e7e9b Update lots of deps 2021-09-11 01:35:23 +02:00
Côme ALLART
addee8778d refactor(gen-features): use Rust instead of Python 
Added support for /stm32-metapac
 2021-09-05 20:19:13 +02:00
Dario Nieuwenhuis
d3aeb45fb3 Update cortex-m-rt to v0.7 for stm32, rp. 2021-08-19 00:56:11 +02:00
Bob McWhirter
63b32b39e1 Use an em bikeshed instead of an underscore bikeshed. 2021-08-02 13:29:06 -04:00
Bob McWhirter
5f9447abb4 Put the implicit memory.x behind a memory_x feature on embassy-stm32. 2021-08-02 13:21:30 -04:00
Dario Nieuwenhuis
1d64421fb4 Fix "can't find crate for std" for stm32-metapac-gen deps. 2021-07-13 05:47:10 +02:00
Bob McWhirter
497d3aa153 Add USARTv3 support. 2021-07-01 11:30:54 -04:00
Bob McWhirter
2a25de3d3e Make the metapac gen enr/rst missing regs non-fatal to the build. 
Should be solved in a separate effort.
 2021-06-29 12:55:15 -04:00
Bob McWhirter
24f18819c8 Adjust example for RCC and DMA. 2021-06-29 11:01:57 -04:00
Bob McWhirter
b88fc2847a Checkpoint with lifetime issues. 2021-06-29 11:01:57 -04:00
Bob McWhirter
1732551db4 Generate dma-related macro tables. 2021-06-29 11:01:45 -04:00
Thales Fragoso
210104e6dc Remove unused gpio_af from codegen 2021-06-24 19:23:51 -03:00
Dario Nieuwenhuis
5a4e3ceb88 Update stm32-data (adds DBGMCU to all chips) 2021-06-21 01:38:59 +02:00
Ulf Lilleengen
b6a8703698 Add support for generating PAC for dual cores 
* Chips that have multiple cores will be exposed as chipname_corename,
  i.e. stm32wl55jc_cm4
* Chips that have single cores will use the chip family as feature name
  and pick the first and only core from the list
* Add support for stm32wl55 chip family
 2021-06-16 15:12:07 +02:00
Ulf Lilleengen
49fad2de8a Use correct frequencies for timers 2021-06-15 16:07:23 +02:00
Ulf Lilleengen
5e1b0a5398 Add wb55 clocks 2021-06-14 11:41:02 +02:00
Ulf Lilleengen
95532726b2 Add minimal RCC impls for L4 and F4 2021-06-14 11:33:11 +02:00
Ulf Lilleengen
952f525af5 Provide a way for a peripheral to query its clock frequency 
Currently this looks up the frequency in the global singleton that must
be initialized by the per-chip RCC implementation. At present, this is
only done for the L0 family of chips.
 2021-06-14 11:33:11 +02:00
Ulf Lilleengen
6c7fd3e3c4 Refactor 2021-06-11 16:21:51 +02:00
Ulf Lilleengen
8dd3ddd228 Special handling for timers instead 2021-06-10 09:52:57 +02:00
Ulf Lilleengen
0a9022d59f Enable timer clock in RCC on timer start 
* Moves the tim2-specific code into macro which always uses TIM2
* For peripherals without clock specified, attempt to locate enable and
  reset registers in the RCC block matching the peripheral name. This
  could be useful for peripherals where deducing the clock name might
  not be feasible, but it remains to be tested with more chip families
  to see if it is sufficiently accurate.
 2021-06-10 09:37:30 +02:00
Dario Nieuwenhuis
5b8ac447f2 stm32-metapac: add new codegen, allows pregenerating the entire pac 2021-06-10 02:33:38 +02:00
Ulf Lilleengen
9a2adec584 Make RCC lookup optional 2021-06-09 19:33:29 +02:00
Ulf Lilleengen
a92d6a372b Cleanup and fix l4s 2021-06-09 13:50:04 +02:00
Ulf Lilleengen
bd759510ba Generate clock peripherals for all peripherals with register block 
Infers clock for a peripheral using the selected clock as a prefix, in
order to work with split registers
 2021-06-09 13:40:34 +02:00
Ulf Lilleengen
f7394e56ef Handle other L4 variants 2021-06-08 17:37:41 +02:00
Ulf Lilleengen
459049d604 Workaround for L4 2021-06-08 17:20:29 +02:00
Ulf Lilleengen
ee47a3e802 Add workaround for STM32H7 2021-06-08 17:20:29 +02:00