Thales Fragoso
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0b607ca80a
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Initial H7 sdmmc support
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2021-05-14 23:40:28 -03:00 |
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Bob McWhirter
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2569d38ab4
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Adjust pin-names to FooPin.
Move common bits up to spi/mod.rs.
Isolate the RNG interrupt in a sub-module to avoid conflict with the const.
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2021-05-14 10:11:43 -04:00 |
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Bob McWhirter
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9e93a0999f
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Add SPIv1, use cfg_attr to pick correct impl.
Add IRQ to impl_rng!() to accomodate RNG vs HASH_RNG split.
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2021-05-13 14:28:53 -04:00 |
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Bob McWhirter
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36c16dbef8
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Continuing to update clocks (unused now) and SPI
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2021-05-12 10:46:18 -04:00 |
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Bob McWhirter
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7d52e1b350
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Further work on SPI v2 blocking.
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2021-05-11 11:25:01 -04:00 |
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Bob McWhirter
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0470abb353
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Checkpoint.
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2021-05-10 15:33:37 -04:00 |
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Dario Nieuwenhuis
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c4294d97ff
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Fix DMA
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2021-05-10 21:31:59 +02:00 |
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Dario Nieuwenhuis
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ac616a6dcf
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Add dma scaffolding
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2021-05-10 01:20:04 +02:00 |
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Bob McWhirter
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75fe03a7e6
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Further clean-up and adjustments. Follow RM for FIPS.
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2021-05-06 16:38:53 -04:00 |
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Bob McWhirter
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e8898b48f9
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Clean up the impl_rng!() argument.
use poll_fn instead of impl'ing a Future directly.
Return errors when error conditions exist.
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2021-05-06 14:58:41 -04:00 |
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Bob McWhirter
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e8537ca9c2
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Implement async RNG, including rand_core sync traits.
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2021-05-06 14:35:46 -04:00 |
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Dario Nieuwenhuis
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f5f98cdeab
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Autogenerate features for family, peripherals and peripheral versions
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2021-05-06 03:59:16 +02:00 |
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Dario Nieuwenhuis
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23ca2f9174
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Autogenerate the tailored PAC for each chip
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2021-05-06 03:43:46 +02:00 |
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Bob McWhirter
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d8156b43b1
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Generate some chip features by peripherals.
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2021-05-05 11:01:02 -04:00 |
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Bob McWhirter
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e248baecd4
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Regenerate with SYSCFG and EXTI base addresses.
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2021-05-05 10:18:09 -04:00 |
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Dario Nieuwenhuis
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7ef5806168
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stm32: codegen interrupts
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2021-05-01 03:08:52 +02:00 |
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Bob McWhirter
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0713947d67
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Stub in RNG impl.
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2021-04-26 14:11:46 -04:00 |
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Dario Nieuwenhuis
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936efd164d
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USART codegen
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2021-04-25 22:35:51 +02:00 |
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Dario Nieuwenhuis
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6ba915a308
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Codegen GPIO pins
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2021-04-23 23:47:34 +02:00 |
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Dario Nieuwenhuis
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29b5bae1d1
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Codegen PoC
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2021-04-20 03:37:49 +02:00 |
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