Dario Nieuwenhuis
b4567bb8c5
stm32/rcc: g4: consistent PllSource, add pll pqr limits, simplify a bit.
2024-03-04 00:04:06 +01:00
Dario Nieuwenhuis
95234cddba
stm32: autogenerate mux config for all chips.
2024-03-01 23:54:37 +01:00
Barnaby Walters
5b7eff6541
[embassy-stm32]: started stm32g4 RCC refactor
...
* Copied API from f.rs where applicable
* HSE and HSI independantly configurable
* Boost mode set by user rather
* Added HSE, pll1_q and pll1_p frequencies to set_clocks call
* Stubbed max module based on f.rs, needs cleanup
2024-02-15 23:56:26 +01:00
Dario Nieuwenhuis
8b36a32ed5
ci: use beta, add secondary nightly ci.
2023-12-21 15:03:57 +01:00
Dario Nieuwenhuis
4fe344ebc0
stm32/rcc: consistent casing and naming for PLL enums.
2023-11-13 00:52:01 +01:00
Dario Nieuwenhuis
412bcad2d1
stm32: rename HSI16 -> HSI
2023-10-22 22:39:55 +02:00
Adam Greig
0621e957a0
time: Update examples, tests, and other code to use new Timer::after_x convenience methods
2023-10-15 01:30:12 +01:00
Dario Nieuwenhuis
6186fe0807
stm32/rcc: use PLL enums from PAC.
2023-10-09 02:48:22 +02:00
Kevin Lannen
c94ba84892
stm32g4: PLL: Add support for configuring PLL_P and PLL_Q
2023-06-14 10:44:51 -06:00
Carl St-Laurent
8ddeaddc67
Rename to follow ref manual and CubeIDE
2023-06-08 20:46:48 -04:00
Carl St-Laurent
ade46489f1
Added Vcore boost mode and Flash wait state
2023-06-04 11:57:42 -04:00
Carl St-Laurent
e83762e979
Use HSI16 for exemple since HSE might have a different value depending on board
2023-06-04 11:05:13 -04:00
Carl St-Laurent
675499449f
Example using PLL
2023-06-03 22:10:43 -04:00
