LailaTheElf/embassy
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

delete unused "info!" and fmt

Browse Source
This commit is contained in:
Chen Yuheng 2024-07-11 15:34:34 +08:00
parent f01ffbcc12
commit fd5501d455
2 changed files with 15 additions and 9 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

22
embassy-stm32/src/adc/g4.rs
View File

@ -1,9 +1,9 @@
#[allow(unused)] #[allow(unused)]
#[cfg(stm32g4)]
use pac::adc::vals::{Adcaldif, Difsel, Exten, Rovsm, Trovs};
#[cfg(stm32h7)] #[cfg(stm32h7)]
use pac::adc::vals::{Adcaldif, Difsel, Exten}; use pac::adc::vals::{Adcaldif, Difsel, Exten};
#[allow(unused)]
#[cfg(stm32g4)]
use pac::adc::vals::{Adcaldif, Difsel, Exten, Rovsm, Trovs};
use pac::adccommon::vals::Presc; use pac::adccommon::vals::Presc;
use super::{blocking_delay_us, Adc, AdcChannel, Instance, Resolution, SampleTime}; use super::{blocking_delay_us, Adc, AdcChannel, Instance, Resolution, SampleTime};
@ -241,10 +241,17 @@ impl<'d, T: Instance> Adc<'d, T> {
/// channel on the other ADC unusable. The only exception is when ADC master and the slave /// channel on the other ADC unusable. The only exception is when ADC master and the slave
/// operate in interleaved mode. /// operate in interleaved mode.
#[cfg(stm32g4)] #[cfg(stm32g4)]
pub fn set_differential_channel(&mut self, ch: usize ,enable: bool) { pub fn set_differential_channel(&mut self, ch: usize, enable: bool) {
T::regs().cr().modify(|w| w.set_aden(false)); // disable adc T::regs().cr().modify(|w| w.set_aden(false)); // disable adc
T::regs().difsel().modify(|w| { T::regs().difsel().modify(|w| {
w.set_difsel(ch, if enable { Difsel::DIFFERENTIAL } else { Difsel::SINGLEENDED }); w.set_difsel(
ch,
if enable {
Difsel::DIFFERENTIAL
} else {
Difsel::SINGLEENDED
},
);
}); });
T::regs().cr().modify(|w| w.set_aden(true)); T::regs().cr().modify(|w| w.set_aden(true));
} }
@ -268,8 +275,8 @@ impl<'d, T: Instance> Adc<'d, T> {
/// Enable oversampling in regular mode. /// Enable oversampling in regular mode.
#[cfg(stm32g4)] #[cfg(stm32g4)]
pub fn enable_regular_oversampling_mode(&mut self,mode:Rovsm,trig_mode:Trovs, enable: bool) { pub fn enable_regular_oversampling_mode(&mut self, mode: Rovsm, trig_mode: Trovs, enable: bool) {
T::regs().cfgr2().modify(|reg| reg.set_trovs(trig_mode)); T::regs().cfgr2().modify(|reg| reg.set_trovs(trig_mode));
T::regs().cfgr2().modify(|reg| reg.set_rovsm(mode)); T::regs().cfgr2().modify(|reg| reg.set_rovsm(mode));
T::regs().cfgr2().modify(|reg| reg.set_rovse(enable)); T::regs().cfgr2().modify(|reg| reg.set_rovse(enable));
} }
@ -287,7 +294,6 @@ impl<'d, T: Instance> Adc<'d, T> {
// T::regs().cfgr2().modify(|reg| reg.set_jovse(enable)); // T::regs().cfgr2().modify(|reg| reg.set_jovse(enable));
// } // }
/// Set the ADC sample time. /// Set the ADC sample time.
pub fn set_sample_time(&mut self, sample_time: SampleTime) { pub fn set_sample_time(&mut self, sample_time: SampleTime) {
self.sample_time = sample_time; self.sample_time = sample_time;

2
embassy-stm32/src/adc/mod.rs
View File

@ -23,10 +23,10 @@ pub use _version::*;
#[cfg(any(adc_f1, adc_f3, adc_v1, adc_l0, adc_f3_v1_1))] #[cfg(any(adc_f1, adc_f3, adc_v1, adc_l0, adc_f3_v1_1))]
use embassy_sync::waitqueue::AtomicWaker; use embassy_sync::waitqueue::AtomicWaker;
pub use crate::pac::adc::vals;
#[cfg(not(any(adc_f1, adc_f3_v2)))] #[cfg(not(any(adc_f1, adc_f3_v2)))]
pub use crate::pac::adc::vals::Res as Resolution; pub use crate::pac::adc::vals::Res as Resolution;
pub use crate::pac::adc::vals::SampleTime; pub use crate::pac::adc::vals::SampleTime;
pub use crate::pac::adc::vals ;
use crate::peripherals; use crate::peripherals;
dma_trait!(RxDma, Instance); dma_trait!(RxDma, Instance);