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BufferedUart initialization

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This change modifies UART initialization throughout Embassy to take pins
before interrupts.

Related to #1304.
This commit is contained in:
Michael Gomez
2025-03-19 20:44:16 -07:00
parent a44abaf7e4
commit f1feedf190
24 changed files with 40 additions and 34 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
embassy-nrf/CHANGELOG.md
View File

@@ -11,6 +11,8 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
- bugfix: nrf twim return errors in async\_wait instead of waiting indefinitely
- bugfix: fix missing setting input as disconnected.
- changed: Modify Uarte and BufferedUarte initialization to take pins before interrupts ([#3983](https://github.com/embassy-rs/embassy/pull/3983))
## 0.3.0 - 2025-01-06

10
embassy-nrf/src/buffered_uarte.rs
View File

@@ -227,9 +227,9 @@ impl<'d, U: UarteInstance, T: TimerInstance> BufferedUarte<'d, U, T> {
ppi_ch1: Peri<'d, impl ConfigurableChannel>,
ppi_ch2: Peri<'d, impl ConfigurableChannel>,
ppi_group: Peri<'d, impl Group>,
_irq: impl interrupt::typelevel::Binding<U::Interrupt, InterruptHandler<U>> + 'd,
rxd: Peri<'d, impl GpioPin>,
txd: Peri<'d, impl GpioPin>,
_irq: impl interrupt::typelevel::Binding<U::Interrupt, InterruptHandler<U>> + 'd,
config: Config,
rx_buffer: &'d mut [u8],
tx_buffer: &'d mut [u8],
@@ -262,11 +262,11 @@ impl<'d, U: UarteInstance, T: TimerInstance> BufferedUarte<'d, U, T> {
ppi_ch1: Peri<'d, impl ConfigurableChannel>,
ppi_ch2: Peri<'d, impl ConfigurableChannel>,
ppi_group: Peri<'d, impl Group>,
_irq: impl interrupt::typelevel::Binding<U::Interrupt, InterruptHandler<U>> + 'd,
rxd: Peri<'d, impl GpioPin>,
txd: Peri<'d, impl GpioPin>,
cts: Peri<'d, impl GpioPin>,
rts: Peri<'d, impl GpioPin>,
_irq: impl interrupt::typelevel::Binding<U::Interrupt, InterruptHandler<U>> + 'd,
config: Config,
rx_buffer: &'d mut [u8],
tx_buffer: &'d mut [u8],
@@ -377,8 +377,8 @@ impl<'d, U: UarteInstance> BufferedUarteTx<'d, U> {
/// Create a new BufferedUarteTx without hardware flow control.
pub fn new(
uarte: Peri<'d, U>,
_irq: impl interrupt::typelevel::Binding<U::Interrupt, InterruptHandler<U>> + 'd,
txd: Peri<'d, impl GpioPin>,
_irq: impl interrupt::typelevel::Binding<U::Interrupt, InterruptHandler<U>> + 'd,
config: Config,
tx_buffer: &'d mut [u8],
) -> Self {
@@ -392,9 +392,9 @@ impl<'d, U: UarteInstance> BufferedUarteTx<'d, U> {
/// Panics if `rx_buffer.len()` is odd.
pub fn new_with_cts(
uarte: Peri<'d, U>,
_irq: impl interrupt::typelevel::Binding<U::Interrupt, InterruptHandler<U>> + 'd,
txd: Peri<'d, impl GpioPin>,
cts: Peri<'d, impl GpioPin>,
_irq: impl interrupt::typelevel::Binding<U::Interrupt, InterruptHandler<U>> + 'd,
config: Config,
tx_buffer: &'d mut [u8],
) -> Self {
@@ -588,9 +588,9 @@ impl<'d, U: UarteInstance, T: TimerInstance> BufferedUarteRx<'d, U, T> {
ppi_ch1: Peri<'d, impl ConfigurableChannel>,
ppi_ch2: Peri<'d, impl ConfigurableChannel>,
ppi_group: Peri<'d, impl Group>,
_irq: impl interrupt::typelevel::Binding<U::Interrupt, InterruptHandler<U>> + 'd,
rxd: Peri<'d, impl GpioPin>,
rts: Peri<'d, impl GpioPin>,
_irq: impl interrupt::typelevel::Binding<U::Interrupt, InterruptHandler<U>> + 'd,
config: Config,
rx_buffer: &'d mut [u8],
) -> Self {

4
embassy-nrf/src/uarte.rs
View File

@@ -155,9 +155,9 @@ impl<'d, T: Instance> Uarte<'d, T> {
/// Create a new UARTE without hardware flow control
pub fn new(
uarte: Peri<'d, T>,
_irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
rxd: Peri<'d, impl GpioPin>,
txd: Peri<'d, impl GpioPin>,
_irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
config: Config,
) -> Self {
Self::new_inner(uarte, rxd.into(), txd.into(), None, None, config)
@@ -166,11 +166,11 @@ impl<'d, T: Instance> Uarte<'d, T> {
/// Create a new UARTE with hardware flow control (RTS/CTS)
pub fn new_with_rtscts(
uarte: Peri<'d, T>,
_irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
rxd: Peri<'d, impl GpioPin>,
txd: Peri<'d, impl GpioPin>,
cts: Peri<'d, impl GpioPin>,
rts: Peri<'d, impl GpioPin>,
_irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
config: Config,
) -> Self {
Self::new_inner(