diff --git a/embassy-hal-common/src/peripheral.rs b/embassy-hal-common/src/peripheral.rs index cd0cb8dcb..99df4b894 100644 --- a/embassy-hal-common/src/peripheral.rs +++ b/embassy-hal-common/src/peripheral.rs @@ -43,10 +43,6 @@ impl<'a, T> PeripheralRef<'a, T> { _lifetime: PhantomData, } } - - pub unsafe fn into_inner(self) -> T { - self.inner - } } impl<'a, T> Deref for PeripheralRef<'a, T> { diff --git a/embassy-nrf/src/buffered_uarte.rs b/embassy-nrf/src/buffered_uarte.rs index 48ffe5c29..036af3804 100644 --- a/embassy-nrf/src/buffered_uarte.rs +++ b/embassy-nrf/src/buffered_uarte.rs @@ -147,8 +147,7 @@ impl<'d, U: UarteInstance, T: TimerInstance> BufferedUarte<'d, U, T> { timer.cc(0).short_compare_stop(); let mut ppi_ch1 = Ppi::new_one_to_two( - //TODO: Avoid into_inner? - unsafe { ppi_ch1.into_inner() }.degrade(), + ppi_ch1.map_into(), Event::from_reg(&r.events_rxdrdy), timer.task_clear(), timer.task_start(), @@ -156,16 +155,14 @@ impl<'d, U: UarteInstance, T: TimerInstance> BufferedUarte<'d, U, T> { ppi_ch1.enable(); let mut ppi_ch2 = Ppi::new_one_to_one( - //TODO: Avoid into_inner? - unsafe { ppi_ch2.into_inner() }.degrade(), + ppi_ch2.map_into(), timer.cc(0).event_compare(), Task::from_reg(&r.tasks_stoprx), ); ppi_ch2.enable(); Self { - //TODO: Avoid into_inner? - inner: PeripheralMutex::new(unsafe { irq.into_inner() }, &mut state.0, move || StateInner { + inner: PeripheralMutex::new(irq, &mut state.0, move || StateInner { phantom: PhantomData, timer, _ppi_ch1: ppi_ch1, diff --git a/embassy-nrf/src/gpio.rs b/embassy-nrf/src/gpio.rs index ae08d859a..a61ff6aa5 100644 --- a/embassy-nrf/src/gpio.rs +++ b/embassy-nrf/src/gpio.rs @@ -374,7 +374,7 @@ pub(crate) mod sealed { } } -pub trait Pin: Peripheral
+ sealed::Pin + Sized + 'static { +pub trait Pin: Peripheral
+ Into + 'a) -> PeripheralRef<'a, Self> {
- PeripheralRef::new(AnyPin {
- pin_port: pin.into_ref().pin_port(),
- })
- }
-}
-
-macro_rules! into_degraded_ref {
- ($($name:ident),*) => {
- $(
- let $name = $crate::gpio::AnyPin::into_degraded_ref($name);
- )*
- };
}
impl_peripheral!(AnyPin);
@@ -475,6 +461,12 @@ macro_rules! impl_pin {
$port_num * 32 + $pin_num
}
}
+
+ impl From + Sized {
fn number(&self) -> usize;
}
-pub trait ConfigurableChannel: Channel {
+pub trait ConfigurableChannel: Channel + Into + 'd,
config: Config,
) -> Result + 'd,
config: Config,
) -> Result + 'd,
config: Config,
) -> Result + 'd,
config: Config,
) -> Result + 'd, ch0: impl Peripheral + 'd) -> Self {
unsafe {
- into_degraded_ref!(ch0);
- Self::new_inner(pwm, Some(ch0), None, None, None)
+ into_ref!(ch0);
+ Self::new_inner(pwm, Some(ch0.map_into()), None, None, None)
}
}
@@ -573,8 +587,8 @@ impl<'d, T: Instance> SimplePwm<'d, T> {
ch0: impl Peripheral + 'd,
ch1: impl Peripheral + 'd,
) -> Self {
- into_degraded_ref!(ch0, ch1);
- Self::new_inner(pwm, Some(ch0), Some(ch1), None, None)
+ into_ref!(ch0, ch1);
+ Self::new_inner(pwm, Some(ch0.map_into()), Some(ch1.map_into()), None, None)
}
/// Create a new 3-channel PWM
@@ -586,8 +600,14 @@ impl<'d, T: Instance> SimplePwm<'d, T> {
ch2: impl Peripheral + 'd,
) -> Self {
unsafe {
- into_degraded_ref!(ch0, ch1, ch2);
- Self::new_inner(pwm, Some(ch0), Some(ch1), Some(ch2), None)
+ into_ref!(ch0, ch1, ch2);
+ Self::new_inner(
+ pwm,
+ Some(ch0.map_into()),
+ Some(ch1.map_into()),
+ Some(ch2.map_into()),
+ None,
+ )
}
}
@@ -601,8 +621,14 @@ impl<'d, T: Instance> SimplePwm<'d, T> {
ch3: impl Peripheral + 'd,
) -> Self {
unsafe {
- into_degraded_ref!(ch0, ch1, ch2, ch3);
- Self::new_inner(pwm, Some(ch0), Some(ch1), Some(ch2), Some(ch3))
+ into_ref!(ch0, ch1, ch2, ch3);
+ Self::new_inner(
+ pwm,
+ Some(ch0.map_into()),
+ Some(ch1.map_into()),
+ Some(ch2.map_into()),
+ Some(ch3.map_into()),
+ )
}
}
diff --git a/embassy-nrf/src/qdec.rs b/embassy-nrf/src/qdec.rs
index 2fb31fc2d..d5dc14466 100644
--- a/embassy-nrf/src/qdec.rs
+++ b/embassy-nrf/src/qdec.rs
@@ -49,8 +49,8 @@ impl<'d> Qdec<'d> {
b: impl Peripheral + 'd,
config: Config,
) -> Self {
- into_degraded_ref!(a, b);
- Self::new_inner(qdec, irq, a, b, None, config)
+ into_ref!(a, b);
+ Self::new_inner(qdec, irq, a.map_into(), b.map_into(), None, config)
}
pub fn new_with_led(
@@ -61,8 +61,8 @@ impl<'d> Qdec<'d> {
led: impl Peripheral + 'd,
config: Config,
) -> Self {
- into_degraded_ref!(a, b, led);
- Self::new_inner(qdec, irq, a, b, Some(led), config)
+ into_ref!(a, b, led);
+ Self::new_inner(qdec, irq, a.map_into(), b.map_into(), Some(led.map_into()), config)
}
fn new_inner(
diff --git a/embassy-nrf/src/qspi.rs b/embassy-nrf/src/qspi.rs
index 51d9446a3..67634b5b7 100644
--- a/embassy-nrf/src/qspi.rs
+++ b/embassy-nrf/src/qspi.rs
@@ -7,7 +7,6 @@ use embassy_hal_common::drop::DropBomb;
use embassy_hal_common::{into_ref, PeripheralRef};
use futures::future::poll_fn;
-use crate::gpio::sealed::Pin as _;
use crate::gpio::{self, Pin as GpioPin};
use crate::interrupt::{Interrupt, InterruptExt};
pub use crate::pac::qspi::ifconfig0::{
@@ -82,12 +81,18 @@ impl<'d, T: Instance, const FLASH_SIZE: usize> Qspi<'d, T, FLASH_SIZE> {
let r = T::regs();
- into_degraded_ref!(sck, csn, io0, io1, io2, io3);
-
- for pin in [&sck, &csn, &io0, &io1, &io2, &io3] {
- pin.set_high();
- pin.conf().write(|w| w.dir().output().drive().h0h1());
- }
+ sck.set_high();
+ csn.set_high();
+ io0.set_high();
+ io1.set_high();
+ io2.set_high();
+ io3.set_high();
+ sck.conf().write(|w| w.dir().output().drive().h0h1());
+ csn.conf().write(|w| w.dir().output().drive().h0h1());
+ io0.conf().write(|w| w.dir().output().drive().h0h1());
+ io1.conf().write(|w| w.dir().output().drive().h0h1());
+ io2.conf().write(|w| w.dir().output().drive().h0h1());
+ io3.conf().write(|w| w.dir().output().drive().h0h1());
r.psel.sck.write(|w| unsafe { w.bits(sck.psel_bits()) });
r.psel.csn.write(|w| unsafe { w.bits(csn.psel_bits()) });
diff --git a/embassy-nrf/src/spim.rs b/embassy-nrf/src/spim.rs
index 4bb0f445f..a6b0be076 100644
--- a/embassy-nrf/src/spim.rs
+++ b/embassy-nrf/src/spim.rs
@@ -60,8 +60,15 @@ impl<'d, T: Instance> Spim<'d, T> {
mosi: impl Peripheral + 'd,
config: Config,
) -> Self {
- into_degraded_ref!(sck, miso, mosi);
- Self::new_inner(spim, irq, sck, Some(miso), Some(mosi), config)
+ into_ref!(sck, miso, mosi);
+ Self::new_inner(
+ spim,
+ irq,
+ sck.map_into(),
+ Some(miso.map_into()),
+ Some(mosi.map_into()),
+ config,
+ )
}
pub fn new_txonly(
@@ -71,8 +78,8 @@ impl<'d, T: Instance> Spim<'d, T> {
mosi: impl Peripheral + 'd,
config: Config,
) -> Self {
- into_degraded_ref!(sck, mosi);
- Self::new_inner(spim, irq, sck, None, Some(mosi), config)
+ into_ref!(sck, mosi);
+ Self::new_inner(spim, irq, sck.map_into(), None, Some(mosi.map_into()), config)
}
pub fn new_rxonly(
@@ -82,8 +89,8 @@ impl<'d, T: Instance> Spim<'d, T> {
miso: impl Peripheral + 'd,
config: Config,
) -> Self {
- into_degraded_ref!(sck, miso);
- Self::new_inner(spim, irq, sck, Some(miso), None, config)
+ into_ref!(sck, miso);
+ Self::new_inner(spim, irq, sck.map_into(), Some(miso.map_into()), None, config)
}
fn new_inner(
diff --git a/embassy-nrf/src/uarte.rs b/embassy-nrf/src/uarte.rs
index a556d6b9c..e23525563 100644
--- a/embassy-nrf/src/uarte.rs
+++ b/embassy-nrf/src/uarte.rs
@@ -89,8 +89,8 @@ impl<'d, T: Instance> Uarte<'d, T> {
txd: impl Peripheral + 'd,
config: Config,
) -> Self {
- into_degraded_ref!(rxd, txd);
- Self::new_inner(uarte, irq, rxd, txd, None, None, config)
+ into_ref!(rxd, txd);
+ Self::new_inner(uarte, irq, rxd.map_into(), txd.map_into(), None, None, config)
}
/// Create a new UARTE with hardware flow control (RTS/CTS)
@@ -103,8 +103,16 @@ impl<'d, T: Instance> Uarte<'d, T> {
rts: impl Peripheral + 'd,
config: Config,
) -> Self {
- into_degraded_ref!(rxd, txd, cts, rts);
- Self::new_inner(uarte, irq, rxd, txd, Some(cts), Some(rts), config)
+ into_ref!(rxd, txd, cts, rts);
+ Self::new_inner(
+ uarte,
+ irq,
+ rxd.map_into(),
+ txd.map_into(),
+ Some(cts.map_into()),
+ Some(rts.map_into()),
+ config,
+ )
}
fn new_inner(
@@ -242,8 +250,8 @@ impl<'d, T: Instance> UarteTx<'d, T> {
txd: impl Peripheral + 'd,
config: Config,
) -> Self {
- into_degraded_ref!(txd);
- Self::new_inner(uarte, irq, txd, None, config)
+ into_ref!(txd);
+ Self::new_inner(uarte, irq, txd.map_into(), None, config)
}
/// Create a new tx-only UARTE with hardware flow control (RTS/CTS)
@@ -254,8 +262,8 @@ impl<'d, T: Instance> UarteTx<'d, T> {
cts: impl Peripheral + 'd,
config: Config,
) -> Self {
- into_degraded_ref!(txd, cts);
- Self::new_inner(uarte, irq, txd, Some(cts), config)
+ into_ref!(txd, cts);
+ Self::new_inner(uarte, irq, txd.map_into(), Some(cts.map_into()), config)
}
fn new_inner(
@@ -434,8 +442,8 @@ impl<'d, T: Instance> UarteRx<'d, T> {
rxd: impl Peripheral + 'd,
config: Config,
) -> Self {
- into_degraded_ref!(rxd);
- Self::new_inner(uarte, irq, rxd, None, config)
+ into_ref!(rxd);
+ Self::new_inner(uarte, irq, rxd.map_into(), None, config)
}
/// Create a new rx-only UARTE with hardware flow control (RTS/CTS)
@@ -446,8 +454,8 @@ impl<'d, T: Instance> UarteRx<'d, T> {
rts: impl Peripheral + 'd,
config: Config,
) -> Self {
- into_degraded_ref!(rxd, rts);
- Self::new_inner(uarte, irq, rxd, Some(rts), config)
+ into_ref!(rxd, rts);
+ Self::new_inner(uarte, irq, rxd.map_into(), Some(rts.map_into()), config)
}
fn new_inner(
@@ -677,8 +685,19 @@ impl<'d, U: Instance, T: TimerInstance> UarteWithIdle<'d, U, T> {
txd: impl Peripheral + 'd,
config: Config,
) -> Self {
- into_degraded_ref!(rxd, txd);
- Self::new_inner(uarte, timer, ppi_ch1, ppi_ch2, irq, rxd, txd, None, None, config)
+ into_ref!(rxd, txd);
+ Self::new_inner(
+ uarte,
+ timer,
+ ppi_ch1,
+ ppi_ch2,
+ irq,
+ rxd.map_into(),
+ txd.map_into(),
+ None,
+ None,
+ config,
+ )
}
/// Create a new UARTE with hardware flow control (RTS/CTS)
@@ -694,17 +713,17 @@ impl<'d, U: Instance, T: TimerInstance> UarteWithIdle<'d, U, T> {
rts: impl Peripheral + 'd,
config: Config,
) -> Self {
- into_degraded_ref!(rxd, txd, cts, rts);
+ into_ref!(rxd, txd, cts, rts);
Self::new_inner(
uarte,
timer,
ppi_ch1,
ppi_ch2,
irq,
- rxd,
- txd,
- Some(cts),
- Some(rts),
+ rxd.map_into(),
+ txd.map_into(),
+ Some(cts.map_into()),
+ Some(rts.map_into()),
config,
)
}
@@ -744,7 +763,7 @@ impl<'d, U: Instance, T: TimerInstance> UarteWithIdle<'d, U, T> {
timer.cc(0).short_compare_stop();
let mut ppi_ch1 = Ppi::new_one_to_two(
- unsafe { ppi_ch1.into_inner() }.degrade(),
+ ppi_ch1.map_into(),
Event::from_reg(&r.events_rxdrdy),
timer.task_clear(),
timer.task_start(),
@@ -752,7 +771,7 @@ impl<'d, U: Instance, T: TimerInstance> UarteWithIdle<'d, U, T> {
ppi_ch1.enable();
let mut ppi_ch2 = Ppi::new_one_to_one(
- unsafe { ppi_ch2.into_inner() }.degrade(),
+ ppi_ch2.map_into(),
timer.cc(0).event_compare(),
Task::from_reg(&r.tasks_stoprx),
);
diff --git a/embassy-rp/src/gpio.rs b/embassy-rp/src/gpio.rs
index 3588c2f7e..5db1a690b 100644
--- a/embassy-rp/src/gpio.rs
+++ b/embassy-rp/src/gpio.rs
@@ -647,7 +647,7 @@ pub(crate) mod sealed {
}
}
-pub trait Pin: Peripheral + sealed::Pin {
+pub trait Pin: Peripheral + Into + 'a) -> PeripheralRef<'a, Self> {
- PeripheralRef::new(AnyPin {
- pin_bank: pin.into_ref().pin_bank(),
- })
- }
-}
-
-macro_rules! into_degraded_ref {
- ($($name:ident),*) => {
- $(
- let $name = $crate::gpio::AnyPin::into_degraded_ref($name);
- )*
- };
-}
-
impl_peripheral!(AnyPin);
impl Pin for AnyPin {}
@@ -695,6 +679,12 @@ macro_rules! impl_pin {
($bank as u8) * 32 + $pin_num
}
}
+
+ impl From + 'd> + 'd,
config: Config,
) -> Self {
- into_degraded_ref!(clk, mosi, miso);
- Self::new_inner(inner, Some(clk), Some(mosi), Some(miso), None, config)
+ into_ref!(clk, mosi, miso);
+ Self::new_inner(
+ inner,
+ Some(clk.map_into()),
+ Some(mosi.map_into()),
+ Some(miso.map_into()),
+ None,
+ config,
+ )
}
pub fn new_txonly(
@@ -75,8 +82,8 @@ impl<'d, T: Instance> Spi<'d, T> {
mosi: impl Peripheral + 'd> + 'd,
config: Config,
) -> Self {
- into_degraded_ref!(clk, mosi);
- Self::new_inner(inner, Some(clk), Some(mosi), None, None, config)
+ into_ref!(clk, mosi);
+ Self::new_inner(inner, Some(clk.map_into()), Some(mosi.map_into()), None, None, config)
}
pub fn new_rxonly(
@@ -85,8 +92,8 @@ impl<'d, T: Instance> Spi<'d, T> {
miso: impl Peripheral + 'd> + 'd,
config: Config,
) -> Self {
- into_degraded_ref!(clk, miso);
- Self::new_inner(inner, Some(clk), None, Some(miso), None, config)
+ into_ref!(clk, miso);
+ Self::new_inner(inner, Some(clk.map_into()), None, Some(miso.map_into()), None, config)
}
fn new_inner(