diff --git a/embassy-stm32/Cargo.toml b/embassy-stm32/Cargo.toml index edee4e3a5..ebd62cbf7 100644 --- a/embassy-stm32/Cargo.toml +++ b/embassy-stm32/Cargo.toml @@ -23,6 +23,7 @@ futures = { version = "0.3.17", default-features = false, features = ["async-awa rand_core = "0.6.3" sdio-host = "0.5.0" embedded-sdmmc = { git = "https://github.com/thalesfragoso/embedded-sdmmc-rs", branch = "async", optional = true } +synopsys-usb-otg = { version = "0.3", features = ["cortex-m", "hs"], optional = true } critical-section = "0.2.5" bare-metal = "1.0.0" atomic-polyfill = "0.1.5" @@ -43,6 +44,7 @@ net = ["embassy-net", "vcell"] memory-x = ["stm32-metapac/memory-x"] subghz = [] exti = [] +usb-otg = ["synopsys-usb-otg"] # Features starting with `_` are for internal use only. They're not intended # to be enabled by other crates, and are not covered by semver guarantees. diff --git a/embassy-stm32/build.rs b/embassy-stm32/build.rs index ff91f93de..aee596445 100644 --- a/embassy-stm32/build.rs +++ b/embassy-stm32/build.rs @@ -185,6 +185,14 @@ fn main() { println!("cargo:rustc-cfg={}x{}", &chip_name[..9], &chip_name[10..11]); } + // ======= + // Features for targeting groups of chips + + println!("cargo:rustc-cfg={}", &chip_name[..7]); // stm32f4 + println!("cargo:rustc-cfg={}", &chip_name[..9]); // stm32f429 + println!("cargo:rustc-cfg={}x", &chip_name[..8]); // stm32f42x + println!("cargo:rustc-cfg={}x{}", &chip_name[..7], &chip_name[8..9]); // stm32f4x9 + // ======== // Handle time-driver-XXXX features. diff --git a/embassy-stm32/src/lib.rs b/embassy-stm32/src/lib.rs index 75a4d22d8..4bc044047 100644 --- a/embassy-stm32/src/lib.rs +++ b/embassy-stm32/src/lib.rs @@ -52,6 +52,8 @@ pub mod sdmmc; pub mod spi; #[cfg(usart)] pub mod usart; +#[cfg(feature = "usb-otg")] +pub mod usb_otg; #[cfg(feature = "subghz")] pub mod subghz; diff --git a/embassy-stm32/src/usb_otg.rs b/embassy-stm32/src/usb_otg.rs new file mode 100644 index 000000000..b3494ee7a --- /dev/null +++ b/embassy-stm32/src/usb_otg.rs @@ -0,0 +1,332 @@ +use crate::{peripherals, rcc::RccPeripheral}; +use core::marker::PhantomData; +use embassy::util::Unborrow; +use embassy_hal_common::unborrow; +pub use embassy_hal_common::usb::*; +pub use synopsys_usb_otg::UsbBus; +use synopsys_usb_otg::{PhyType, UsbPeripheral}; + +macro_rules! config_pins { + ($($pin:ident),*) => { + $( + $pin.configure(); + )* + }; +} + +pub struct UsbOtg<'d, T: Instance> { + phantom: PhantomData<&'d mut T>, + phy_type: PhyType, +} + +impl<'d, T: Instance> UsbOtg<'d, T> { + /// Initializes USB OTG peripheral with internal Full-Speed PHY + pub fn new_fs( + _peri: impl Unborrow + 'd, + dp: impl Unborrow> + 'd, + dm: impl Unborrow> + 'd, + ) -> Self { + unborrow!(dp, dm); + config_pins!(dp, dm); + + Self { + phantom: PhantomData, + phy_type: PhyType::InternalFullSpeed, + } + } + + /// Initializes USB OTG peripheral with external High-Speed PHY + pub fn new_hs_ulpi( + _peri: impl Unborrow + 'd, + ulpi_clk: impl Unborrow> + 'd, + ulpi_dir: impl Unborrow> + 'd, + ulpi_nxt: impl Unborrow> + 'd, + ulpi_stp: impl Unborrow> + 'd, + ulpi_d0: impl Unborrow> + 'd, + ulpi_d1: impl Unborrow> + 'd, + ulpi_d2: impl Unborrow> + 'd, + ulpi_d3: impl Unborrow> + 'd, + ulpi_d4: impl Unborrow> + 'd, + ulpi_d5: impl Unborrow> + 'd, + ulpi_d6: impl Unborrow> + 'd, + ulpi_d7: impl Unborrow> + 'd, + ) -> Self { + unborrow!(ulpi_clk, ulpi_dir, ulpi_nxt, ulpi_stp); + unborrow!(ulpi_d0, ulpi_d1, ulpi_d2, ulpi_d3, ulpi_d4, ulpi_d5, ulpi_d6, ulpi_d7); + config_pins!(ulpi_clk, ulpi_dir, ulpi_nxt, ulpi_stp); + config_pins!(ulpi_d0, ulpi_d1, ulpi_d2, ulpi_d3, ulpi_d4, ulpi_d5, ulpi_d6, ulpi_d7); + + Self { + phantom: PhantomData, + phy_type: PhyType::ExternalHighSpeed, + } + } +} + +impl<'d, T: Instance> Drop for UsbOtg<'d, T> { + fn drop(&mut self) { + T::reset(); + T::disable(); + } +} + +unsafe impl<'d, T: Instance> Send for UsbOtg<'d, T> {} +unsafe impl<'d, T: Instance> Sync for UsbOtg<'d, T> {} + +unsafe impl<'d, T: Instance> UsbPeripheral for UsbOtg<'d, T> { + const REGISTERS: *const () = T::REGISTERS; + const HIGH_SPEED: bool = T::HIGH_SPEED; + const FIFO_DEPTH_WORDS: usize = T::FIFO_DEPTH_WORDS; + const ENDPOINT_COUNT: usize = T::ENDPOINT_COUNT; + + fn enable() { + ::enable(); + ::reset(); + } + + fn phy_type(&self) -> PhyType { + self.phy_type + } + + fn ahb_frequency_hz(&self) -> u32 { + ::frequency().0 + } +} + +pub(crate) mod sealed { + pub trait Instance { + const REGISTERS: *const (); + const HIGH_SPEED: bool; + const FIFO_DEPTH_WORDS: usize; + const ENDPOINT_COUNT: usize; + } + + macro_rules! declare_pins { + ($name:ident) => { + pub trait $name { + fn configure(&mut self); + } + }; + + ($($name:ident),*) => { + $( + declare_pins!($name); + )* + }; + } + + // Internal PHY pins + declare_pins!(DpPin, DmPin); + + // External PHY pins + declare_pins!(UlpiClkPin, UlpiDirPin, UlpiNxtPin, UlpiStpPin); + declare_pins!(UlpiD0Pin, UlpiD1Pin, UlpiD2Pin, UlpiD3Pin); + declare_pins!(UlpiD4Pin, UlpiD5Pin, UlpiD6Pin, UlpiD7Pin); +} + +pub trait Instance: sealed::Instance + RccPeripheral {} + +macro_rules! declare_pins { + ($name:ident) => { + pub trait $name: sealed::$name {} + }; + + ($($name:ident),*) => { + $( + declare_pins!($name); + )* + }; +} + +declare_pins!(DpPin, DmPin); +declare_pins!(UlpiClkPin, UlpiDirPin, UlpiNxtPin, UlpiStpPin); +declare_pins!(UlpiD0Pin, UlpiD1Pin, UlpiD2Pin, UlpiD3Pin); +declare_pins!(UlpiD4Pin, UlpiD5Pin, UlpiD6Pin, UlpiD7Pin); + +crate::pac::peripherals!( + (otgfs, $inst:ident) => { + impl sealed::Instance for peripherals::$inst { + const REGISTERS: *const () = crate::pac::$inst.0 as *const (); + const HIGH_SPEED: bool = false; + + cfg_if::cfg_if! { + if #[cfg(stm32f1)] { + const FIFO_DEPTH_WORDS: usize = 128; + const ENDPOINT_COUNT: usize = 8; + } else if #[cfg(any( + stm32f2, + stm32f401, + stm32f405, + stm32f407, + stm32f411, + stm32f415, + stm32f417, + stm32f427, + stm32f429, + stm32f437, + stm32f439, + ))] { + const FIFO_DEPTH_WORDS: usize = 320; + const ENDPOINT_COUNT: usize = 4; + } else if #[cfg(any( + stm32f412, + stm32f413, + stm32f423, + stm32f446, + stm32f469, + stm32f479, + stm32f7, + stm32l4, + stm32u5, + ))] { + const FIFO_DEPTH_WORDS: usize = 320; + const ENDPOINT_COUNT: usize = 6; + } else if #[cfg(stm32g0x1)] { + const FIFO_DEPTH_WORDS: usize = 512; + const ENDPOINT_COUNT: usize = 8; + } else { + compile_error!("USB_OTG_FS peripheral is not supported by this chip. Disable \"usb-otg-fs\" feature or select a different chip."); + } + } + } + + impl Instance for peripherals::$inst {} + }; + + (otghs, $inst:ident) => { + impl sealed::Instance for peripherals::$inst { + const REGISTERS: *const () = crate::pac::$inst.0 as *const (); + const HIGH_SPEED: bool = true; + + cfg_if::cfg_if! { + if #[cfg(any( + stm32f2, + stm32f405, + stm32f407, + stm32f415, + stm32f417, + stm32f427, + stm32f429, + stm32f437, + stm32f439, + ))] { + const FIFO_DEPTH_WORDS: usize = 1024; + const ENDPOINT_COUNT: usize = 6; + } else if #[cfg(any( + stm32f446, + stm32f469, + stm32f479, + stm32f7, + stm32h7, + ))] { + const FIFO_DEPTH_WORDS: usize = 1024; + const ENDPOINT_COUNT: usize = 9; + } else { + compile_error!("USB_OTG_HS peripheral is not supported by this chip. Disable \"usb-otg-hs\" feature or select a different chip."); + } + } + } + + impl Instance for peripherals::$inst {} + }; +); + +crate::pac::interrupts!( + ($inst:ident, otgfs, $block:ident, GLOBAL, $irq:ident) => { + unsafe impl USBInterrupt for crate::interrupt::$irq {} + }; + ($inst:ident, otghs, $block:ident, GLOBAL, $irq:ident) => { + unsafe impl USBInterrupt for crate::interrupt::$irq {} + }; +); + +macro_rules! impl_pin { + ($inst:ident, $pin:ident, $signal:ident, $af:expr) => { + impl $signal for peripherals::$pin {} + + impl sealed::$signal for peripherals::$pin { + fn configure(&mut self) { + use crate::gpio::sealed::{AFType::OutputPushPull, Pin as SealedPin}; + + critical_section::with(|_| unsafe { + self.set_as_af($af, OutputPushPull); + }); + } + } + }; +} + +// ULPI pins have to be set to VeryHigh speed +macro_rules! impl_ulpi_pin { + ($inst:ident, $pin:ident, $signal:ident, $af:expr) => { + impl $signal for peripherals::$pin {} + + impl sealed::$signal for peripherals::$pin { + fn configure(&mut self) { + use crate::gpio::sealed::{AFType::OutputPushPull, Pin as SealedPin}; + use crate::gpio::Speed; + + critical_section::with(|_| unsafe { + self.set_as_af($af, OutputPushPull); + self.set_speed(Speed::VeryHigh); + }); + } + } + }; +} + +crate::pac::peripheral_pins!( + // FS internal phy pins + ($inst:ident, otgfs, OTG_FS, $pin:ident, DP, $af:expr) => { + impl_pin!($inst, $pin, DpPin, $af); + }; + ($inst:ident, otgfs, OTG_FS, $pin:ident, DM, $af:expr) => { + impl_pin!($inst, $pin, DmPin, $af); + }; + + // HS internal phy pins + ($inst:ident, otghs, OTG_HS, $pin:ident, DP, $af:expr) => { + impl_pin!($inst, $pin, DpPin, $af); + }; + ($inst:ident, otghs, OTG_HS, $pin:ident, DM, $af:expr) => { + impl_pin!($inst, $pin, DmPin, $af); + }; + + // HS external phy pins + ($inst:ident, otghs, OTG_HS, $pin:ident, ULPI_CK, $af:expr) => { + impl_ulpi_pin!($inst, $pin, UlpiClkPin, $af); + }; + ($inst:ident, otghs, OTG_HS, $pin:ident, ULPI_DIR, $af:expr) => { + impl_ulpi_pin!($inst, $pin, UlpiDirPin, $af); + }; + ($inst:ident, otghs, OTG_HS, $pin:ident, ULPI_NXT, $af:expr) => { + impl_ulpi_pin!($inst, $pin, UlpiNxtPin, $af); + }; + ($inst:ident, otghs, OTG_HS, $pin:ident, ULPI_STP, $af:expr) => { + impl_ulpi_pin!($inst, $pin, UlpiStpPin, $af); + }; + ($inst:ident, otghs, OTG_HS, $pin:ident, ULPI_D0, $af:expr) => { + impl_ulpi_pin!($inst, $pin, UlpiD0Pin, $af); + }; + ($inst:ident, otghs, OTG_HS, $pin:ident, ULPI_D1, $af:expr) => { + impl_ulpi_pin!($inst, $pin, UlpiD1Pin, $af); + }; + ($inst:ident, otghs, OTG_HS, $pin:ident, ULPI_D2, $af:expr) => { + impl_ulpi_pin!($inst, $pin, UlpiD2Pin, $af); + }; + ($inst:ident, otghs, OTG_HS, $pin:ident, ULPI_D3, $af:expr) => { + impl_ulpi_pin!($inst, $pin, UlpiD3Pin, $af); + }; + ($inst:ident, otghs, OTG_HS, $pin:ident, ULPI_D4, $af:expr) => { + impl_ulpi_pin!($inst, $pin, UlpiD4Pin, $af); + }; + ($inst:ident, otghs, OTG_HS, $pin:ident, ULPI_D5, $af:expr) => { + impl_ulpi_pin!($inst, $pin, UlpiD5Pin, $af); + }; + ($inst:ident, otghs, OTG_HS, $pin:ident, ULPI_D6, $af:expr) => { + impl_ulpi_pin!($inst, $pin, UlpiD6Pin, $af); + }; + ($inst:ident, otghs, OTG_HS, $pin:ident, ULPI_D7, $af:expr) => { + impl_ulpi_pin!($inst, $pin, UlpiD7Pin, $af); + }; +); diff --git a/examples/stm32f4/Cargo.toml b/examples/stm32f4/Cargo.toml index 67b212d5c..798144c2b 100644 --- a/examples/stm32f4/Cargo.toml +++ b/examples/stm32f4/Cargo.toml @@ -8,7 +8,7 @@ resolver = "2" [dependencies] embassy = { version = "0.1.0", path = "../../embassy", features = ["defmt", "unstable-traits"] } -embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = ["defmt", "stm32f429zi", "unstable-pac", "memory-x", "time-driver-any", "exti"] } +embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = ["defmt", "stm32f429zi", "unstable-pac", "memory-x", "time-driver-any", "exti", "usb-otg"] } defmt = "0.3" defmt-rtt = "0.3" @@ -20,3 +20,6 @@ panic-probe = { version = "0.3", features = ["print-defmt"] } futures = { version = "0.3.17", default-features = false, features = ["async-await"] } heapless = { version = "0.7.5", default-features = false } nb = "1.0.0" + +usb-device = "0.2" +usbd-serial = "0.1.1" diff --git a/examples/stm32f4/src/bin/usb_uart.rs b/examples/stm32f4/src/bin/usb_uart.rs new file mode 100644 index 000000000..63059d51f --- /dev/null +++ b/examples/stm32f4/src/bin/usb_uart.rs @@ -0,0 +1,99 @@ +#![no_std] +#![no_main] +#![feature(type_alias_impl_trait)] + +#[path = "../example_common.rs"] +mod example_common; + +use defmt::{info, unwrap}; +use defmt_rtt as _; // global logger +use embassy::interrupt::InterruptExt; +use futures::pin_mut; +use panic_probe as _; // print out panic messages + +use embassy::executor::Spawner; +use embassy::io::{AsyncBufReadExt, AsyncWriteExt}; +use embassy_stm32::usb_otg::{State, Usb, UsbBus, UsbOtg, UsbSerial}; +use embassy_stm32::{interrupt, time::Hertz, Config, Peripherals}; +use usb_device::device::{UsbDeviceBuilder, UsbVidPid}; + +static mut EP_MEMORY: [u32; 2048] = [0; 2048]; + +// USB requires at least 48 MHz clock +fn config() -> Config { + let mut config = Config::default(); + config.rcc.sys_ck = Some(Hertz(48_000_000)); + config +} + +#[embassy::main(config = "config()")] +async fn main(_spawner: Spawner, p: Peripherals) { + let mut rx_buffer = [0u8; 64]; + // we send back input + cr + lf + let mut tx_buffer = [0u8; 66]; + + let peri = UsbOtg::new_fs(p.USB_OTG_FS, p.PA12, p.PA11); + let usb_bus = UsbBus::new(peri, unsafe { &mut EP_MEMORY }); + + let serial = UsbSerial::new(&usb_bus, &mut rx_buffer, &mut tx_buffer); + + let device = UsbDeviceBuilder::new(&usb_bus, UsbVidPid(0x16c0, 0x27dd)) + .manufacturer("Fake company") + .product("Serial port") + .serial_number("TEST") + .device_class(0x02) + .build(); + + let irq = interrupt::take!(OTG_FS); + irq.set_priority(interrupt::Priority::P3); + + let mut state = State::new(); + let usb = unsafe { Usb::new(&mut state, device, serial, irq) }; + pin_mut!(usb); + + let (mut reader, mut writer) = usb.as_ref().take_serial_0(); + + info!("usb initialized!"); + + unwrap!( + writer + .write_all(b"\r\nInput returned upper cased on CR+LF\r\n") + .await + ); + + let mut buf = [0u8; 64]; + loop { + let mut n = 0; + + async { + loop { + let char = unwrap!(reader.read_byte().await); + + if char == b'\r' || char == b'\n' { + break; + } + + buf[n] = char; + n += 1; + + // stop if we're out of room + if n == buf.len() { + break; + } + } + } + .await; + + if n > 0 { + for char in buf[..n].iter_mut() { + // upper case + if 0x61 <= *char && *char <= 0x7a { + *char &= !0x20; + } + } + unwrap!(writer.write_all(&buf[..n]).await); + unwrap!(writer.write_all(b"\r\n").await); + unwrap!(writer.flush().await); + } + } +} diff --git a/examples/stm32f4/src/bin/usb_uart_ulpi.rs b/examples/stm32f4/src/bin/usb_uart_ulpi.rs new file mode 100644 index 000000000..a55502728 --- /dev/null +++ b/examples/stm32f4/src/bin/usb_uart_ulpi.rs @@ -0,0 +1,114 @@ +#![no_std] +#![no_main] +#![feature(type_alias_impl_trait)] + +#[path = "../example_common.rs"] +mod example_common; + +use defmt::{info, unwrap}; +use defmt_rtt as _; // global logger +use embassy::interrupt::InterruptExt; +use futures::pin_mut; +use panic_probe as _; // print out panic messages + +use embassy::executor::Spawner; +use embassy::io::{AsyncBufReadExt, AsyncWriteExt}; +use embassy_stm32::usb_otg::{State, Usb, UsbBus, UsbOtg, UsbSerial}; +use embassy_stm32::{interrupt, time::Hertz, Config, Peripherals}; +use usb_device::device::{UsbDeviceBuilder, UsbVidPid}; + +static mut EP_MEMORY: [u32; 2048] = [0; 2048]; + +// USB requires at least 48 MHz clock +fn config() -> Config { + let mut config = Config::default(); + config.rcc.sys_ck = Some(Hertz(48_000_000)); + config +} + +#[embassy::main(config = "config()")] +async fn main(_spawner: Spawner, p: Peripherals) { + let mut rx_buffer = [0u8; 64]; + // we send back input + cr + lf + let mut tx_buffer = [0u8; 66]; + + // USB with external high-speed PHY + let peri = UsbOtg::new_hs_ulpi( + p.USB_OTG_HS, + p.PA5, + p.PC2, + p.PC3, + p.PC0, + p.PA3, + p.PB0, + p.PB1, + p.PB10, + p.PB11, + p.PB12, + p.PB13, + p.PB5, + ); + let usb_bus = UsbBus::new(peri, unsafe { &mut EP_MEMORY }); + + let serial = UsbSerial::new(&usb_bus, &mut rx_buffer, &mut tx_buffer); + + let device = UsbDeviceBuilder::new(&usb_bus, UsbVidPid(0x16c0, 0x27dd)) + .manufacturer("Fake company") + .product("Serial port") + .serial_number("TEST") + .device_class(0x02) + .build(); + + let irq = interrupt::take!(OTG_FS); + irq.set_priority(interrupt::Priority::P3); + + let mut state = State::new(); + let usb = unsafe { Usb::new(&mut state, device, serial, irq) }; + pin_mut!(usb); + + let (mut reader, mut writer) = usb.as_ref().take_serial_0(); + + info!("usb initialized!"); + + unwrap!( + writer + .write_all(b"\r\nInput returned upper cased on CR+LF\r\n") + .await + ); + + let mut buf = [0u8; 64]; + loop { + let mut n = 0; + + async { + loop { + let char = unwrap!(reader.read_byte().await); + + if char == b'\r' || char == b'\n' { + break; + } + + buf[n] = char; + n += 1; + + // stop if we're out of room + if n == buf.len() { + break; + } + } + } + .await; + + if n > 0 { + for char in buf[..n].iter_mut() { + // upper case + if 0x61 <= *char && *char <= 0x7a { + *char &= !0x20; + } + } + unwrap!(writer.write_all(&buf[..n]).await); + unwrap!(writer.write_all(b"\r\n").await); + unwrap!(writer.flush().await); + } + } +}