Fix & Revert
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52ab015fac
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d0340ad297
@ -126,6 +126,7 @@ pub(crate) unsafe fn init(config: Config) {
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Sysclk::HSE => unwrap!(hse),
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Sysclk::HSE => unwrap!(hse),
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_ => unreachable!(),
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_ => unreachable!(),
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};
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};
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rcc_assert!(max::SYSCLK.contains(&sys));
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rcc_assert!(max::SYSCLK.contains(&sys));
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// Calculate the AHB frequency (HCLK), among other things so we can calculate the correct flash read latency.
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// Calculate the AHB frequency (HCLK), among other things so we can calculate the correct flash read latency.
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@ -133,7 +134,7 @@ pub(crate) unsafe fn init(config: Config) {
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rcc_assert!(max::HCLK.contains(&hclk));
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rcc_assert!(max::HCLK.contains(&hclk));
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let (pclk1, pclk1_tim) = super::util::calc_pclk(hclk, config.apb1_pre);
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let (pclk1, pclk1_tim) = super::util::calc_pclk(hclk, config.apb1_pre);
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rcc_assert(max::PCLK.contains(&pclk1));
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rcc_assert!(max::PCLK.contains(&pclk1));
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let latency = match hclk.0 {
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let latency = match hclk.0 {
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..=24_000_000 => Latency::WS0,
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..=24_000_000 => Latency::WS0,
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@ -238,6 +238,7 @@ pub(crate) unsafe fn init(config: Config) {
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let (pclk2, pclk2_tim) = super::util::calc_pclk(hclk, config.apb2_pre);
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let (pclk2, pclk2_tim) = super::util::calc_pclk(hclk, config.apb2_pre);
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#[cfg(stm32f0)]
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#[cfg(stm32f0)]
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let (pclk2, pclk2_tim) = (pclk1, pclk1_tim);
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let (pclk2, pclk2_tim) = (pclk1, pclk1_tim);
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rcc_assert!(max::HCLK.contains(&hclk));
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rcc_assert!(max::HCLK.contains(&hclk));
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rcc_assert!(max::PCLK1.contains(&pclk1));
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rcc_assert!(max::PCLK1.contains(&pclk1));
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#[cfg(not(stm32f0))]
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#[cfg(not(stm32f0))]
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@ -227,6 +227,7 @@ pub(crate) unsafe fn init(config: Config) {
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Sysclk::PLL1_R => unwrap!(pll.pll_r),
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Sysclk::PLL1_R => unwrap!(pll.pll_r),
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_ => unreachable!(),
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_ => unreachable!(),
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};
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};
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rcc_assert!(max::SYSCLK.contains(&sys));
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rcc_assert!(max::SYSCLK.contains(&sys));
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// Calculate the AHB frequency (HCLK), among other things so we can calculate the correct flash read latency.
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// Calculate the AHB frequency (HCLK), among other things so we can calculate the correct flash read latency.
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