diff --git a/embassy-stm32/src/rcc/c0.rs b/embassy-stm32/src/rcc/c0.rs
index c989a3891..977b2e7a2 100644
--- a/embassy-stm32/src/rcc/c0.rs
+++ b/embassy-stm32/src/rcc/c0.rs
@@ -126,6 +126,7 @@ pub(crate) unsafe fn init(config: Config) {
         Sysclk::HSE => unwrap!(hse),
         _ => unreachable!(),
     };
+
     rcc_assert!(max::SYSCLK.contains(&sys));
 
     // Calculate the AHB frequency (HCLK), among other things so we can calculate the correct flash read latency.
@@ -133,7 +134,7 @@ pub(crate) unsafe fn init(config: Config) {
     rcc_assert!(max::HCLK.contains(&hclk));
 
     let (pclk1, pclk1_tim) = super::util::calc_pclk(hclk, config.apb1_pre);
-    rcc_assert(max::PCLK.contains(&pclk1));
+    rcc_assert!(max::PCLK.contains(&pclk1));
 
     let latency = match hclk.0 {
         ..=24_000_000 => Latency::WS0,
diff --git a/embassy-stm32/src/rcc/f013.rs b/embassy-stm32/src/rcc/f013.rs
index cfe44ce54..c915f1b16 100644
--- a/embassy-stm32/src/rcc/f013.rs
+++ b/embassy-stm32/src/rcc/f013.rs
@@ -238,6 +238,7 @@ pub(crate) unsafe fn init(config: Config) {
     let (pclk2, pclk2_tim) = super::util::calc_pclk(hclk, config.apb2_pre);
     #[cfg(stm32f0)]
     let (pclk2, pclk2_tim) = (pclk1, pclk1_tim);
+
     rcc_assert!(max::HCLK.contains(&hclk));
     rcc_assert!(max::PCLK1.contains(&pclk1));
     #[cfg(not(stm32f0))]
diff --git a/embassy-stm32/src/rcc/g0.rs b/embassy-stm32/src/rcc/g0.rs
index 71e524a20..5da33720c 100644
--- a/embassy-stm32/src/rcc/g0.rs
+++ b/embassy-stm32/src/rcc/g0.rs
@@ -227,6 +227,7 @@ pub(crate) unsafe fn init(config: Config) {
         Sysclk::PLL1_R => unwrap!(pll.pll_r),
         _ => unreachable!(),
     };
+
     rcc_assert!(max::SYSCLK.contains(&sys));
 
     // Calculate the AHB frequency (HCLK), among other things so we can calculate the correct flash read latency.