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document clock settings in examples/stm32f4/.../i2s_dma.rs

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vinsynth 2025-02-03 22:52:38 -05:00
parent b5a6353714
commit b0e3a6481b
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examples/stm32f4/src/bin/i2s_dma.rs
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@ -36,6 +36,8 @@ async fn main(_spawner: Spawner) {
config.rcc.apb1_pre = APBPrescaler::DIV2; config.rcc.apb1_pre = APBPrescaler::DIV2;
config.rcc.apb2_pre = APBPrescaler::DIV1; config.rcc.apb2_pre = APBPrescaler::DIV1;
// reference your chip's manual for proper clock settings; this config
// is recommended for a 32 bit frame at 48 kHz sample rate
config.rcc.plli2s = Some(Pll { config.rcc.plli2s = Some(Pll {
prediv: PllPreDiv::DIV25, prediv: PllPreDiv::DIV25,
mul: PllMul::MUL384, mul: PllMul::MUL384,