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fix(stm32): handle half-duplex in ringbuffered read

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Badr Bouslikhin 2025-03-07 18:00:52 +01:00 committed by Dario Nieuwenhuis
parent 668f5d42c3
commit b0ba604ba5
2 changed files with 10 additions and 1 deletions
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1
embassy-stm32/src/usart/mod.rs
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@ -711,7 +711,6 @@ impl<'d> UartRx<'d, Async> {
// make sure USART state is restored to neutral state when this future is dropped // make sure USART state is restored to neutral state when this future is dropped
let on_drop = OnDrop::new(move || { let on_drop = OnDrop::new(move || {
// defmt::trace!("Clear all USART interrupts and DMA Read Request");
// clear all interrupts and DMA Rx Request // clear all interrupts and DMA Rx Request
r.cr1().modify(|w| { r.cr1().modify(|w| {
// disable RXNE interrupt // disable RXNE interrupt

10
embassy-stm32/src/usart/ringbuffered.rs
View File

@ -150,6 +150,16 @@ impl<'d> RingBufferedUartRx<'d> {
pub async fn read(&mut self, buf: &mut [u8]) -> Result<usize, Error> { pub async fn read(&mut self, buf: &mut [u8]) -> Result<usize, Error> {
self.start_dma_or_check_errors()?; self.start_dma_or_check_errors()?;
// In half-duplex mode, we need to disable the Transmitter and enable the Receiver
// since they can't operate simultaneously on the shared line
let r = self.info.regs;
if r.cr3().read().hdsel() && r.cr1().read().te() {
r.cr1().modify(|reg| {
reg.set_re(true);
reg.set_te(false);
});
}
loop { loop {
match self.ring_buf.read(buf) { match self.ring_buf.read(buf) {
Ok((0, _)) => {} Ok((0, _)) => {}