Removed redundant HSI48 configuration
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32e4c93954
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@ -3,8 +3,9 @@ use stm32_metapac::rcc::vals::{Adcsel, Sw};
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use stm32_metapac::FLASH;
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use stm32_metapac::FLASH;
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pub use crate::pac::rcc::vals::{
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pub use crate::pac::rcc::vals::{
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Adcsel as AdcClockSource, Clk48sel, Fdcansel as FdCanClockSource, Hpre as AHBPrescaler, Pllm as PllPreDiv,
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Adcsel as AdcClockSource, Clk48sel as Clk48Src, Fdcansel as FdCanClockSource, Hpre as AHBPrescaler,
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Plln as PllMul, Pllp as PllPDiv, Pllq as PllQDiv, Pllr as PllRDiv, Pllsrc, Ppre as APBPrescaler, Sw as Sysclk,
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Pllm as PllPreDiv, Plln as PllMul, Pllp as PllPDiv, Pllq as PllQDiv, Pllr as PllRDiv, Pllsrc, Ppre as APBPrescaler,
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Sw as Sysclk,
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};
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};
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use crate::pac::{PWR, RCC};
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use crate::pac::{PWR, RCC};
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use crate::time::Hertz;
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use crate::time::Hertz;
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@ -53,17 +54,6 @@ pub struct Pll {
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pub divr: Option<PllRDiv>,
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pub divr: Option<PllRDiv>,
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}
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}
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/// Sets the source for the 48MHz clock to the USB and RNG peripherals.
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pub enum Clock48MhzSrc {
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/// Use the High Speed Internal Oscillator. For USB usage, the CRS must be used to calibrate the
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/// oscillator to comply with the USB specification for oscillator tolerance.
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Hsi48(super::Hsi48Config),
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/// Use the PLLQ output. The PLL must be configured to output a 48MHz clock. For USB usage the
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/// PLL needs to be using the HSE source to comply with the USB specification for oscillator
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/// tolerance.
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PllQ,
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}
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/// Clocks configutation
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/// Clocks configutation
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#[non_exhaustive]
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#[non_exhaustive]
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pub struct Config {
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pub struct Config {
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@ -82,7 +72,7 @@ pub struct Config {
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pub low_power_run: bool,
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pub low_power_run: bool,
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/// Sets the clock source for the 48MHz clock used by the USB and RNG peripherals.
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/// Sets the clock source for the 48MHz clock used by the USB and RNG peripherals.
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pub clk48_src: Option<Clock48MhzSrc>,
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pub clk48_src: Clk48Src,
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pub ls: super::LsConfig,
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pub ls: super::LsConfig,
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@ -106,7 +96,7 @@ impl Default for Config {
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apb1_pre: APBPrescaler::DIV1,
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apb1_pre: APBPrescaler::DIV1,
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apb2_pre: APBPrescaler::DIV1,
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apb2_pre: APBPrescaler::DIV1,
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low_power_run: false,
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low_power_run: false,
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clk48_src: Some(Clock48MhzSrc::Hsi48(Default::default())),
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clk48_src: Clk48Src::HSI48,
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ls: Default::default(),
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ls: Default::default(),
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adc12_clock_source: Adcsel::DISABLE,
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adc12_clock_source: Adcsel::DISABLE,
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adc345_clock_source: Adcsel::DISABLE,
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adc345_clock_source: Adcsel::DISABLE,
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@ -283,19 +273,17 @@ pub(crate) unsafe fn init(config: Config) {
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};
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};
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// Setup the 48 MHz clock if needed
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// Setup the 48 MHz clock if needed
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if let Some(clock_48mhz_src) = config.clk48_src {
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{
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let source = match clock_48mhz_src {
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let source = match config.clk48_src {
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Clock48MhzSrc::PllQ => {
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Clk48Src::PLL1_Q => {
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// Make sure the PLLQ is enabled and running at 48Mhz
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// Make sure the PLLQ is enabled and running at 48Mhz
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let pllq_freq = pll_freq.as_ref().and_then(|f| f.pll_q);
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let pllq_freq = pll_freq.as_ref().and_then(|f| f.pll_q);
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assert!(pllq_freq.is_some() && pllq_freq.unwrap().0 == 48_000_000);
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assert!(pllq_freq.is_some() && pllq_freq.unwrap().0 == 48_000_000);
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crate::pac::rcc::vals::Clk48sel::PLL1_Q
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crate::pac::rcc::vals::Clk48sel::PLL1_Q
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}
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}
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Clock48MhzSrc::Hsi48(config) => {
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Clk48Src::HSI48 => crate::pac::rcc::vals::Clk48sel::HSI48,
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super::init_hsi48(config);
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_ => unreachable!(),
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crate::pac::rcc::vals::Clk48sel::HSI48
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}
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};
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};
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RCC.ccipr().modify(|w| w.set_clk48sel(source));
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RCC.ccipr().modify(|w| w.set_clk48sel(source));
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@ -4,7 +4,7 @@
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use defmt::{panic, *};
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use defmt::{panic, *};
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use embassy_executor::Spawner;
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use embassy_executor::Spawner;
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use embassy_stm32::rcc::{
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use embassy_stm32::rcc::{
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Clock48MhzSrc, Hse, HseMode, Hsi48Config, Pll, PllMul, PllPreDiv, PllQDiv, PllRDiv, Pllsrc, Sysclk,
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Clk48Src, Hse, HseMode, Hsi48Config, Pll, PllMul, PllPreDiv, PllQDiv, PllRDiv, Pllsrc, Sysclk,
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};
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};
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use embassy_stm32::time::Hertz;
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use embassy_stm32::time::Hertz;
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use embassy_stm32::usb::{self, Driver, Instance};
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use embassy_stm32::usb::{self, Driver, Instance};
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@ -47,9 +47,10 @@ async fn main(_spawner: Spawner) {
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if USE_HSI48 {
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if USE_HSI48 {
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// Sets up the Clock Recovery System (CRS) to use the USB SOF to trim the HSI48 oscillator.
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// Sets up the Clock Recovery System (CRS) to use the USB SOF to trim the HSI48 oscillator.
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config.rcc.clk48_src = Some(Clock48MhzSrc::Hsi48(Hsi48Config { sync_from_usb: true }));
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config.rcc.hsi48 = Some(Hsi48Config { sync_from_usb: true });
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config.rcc.clk48_src = Clk48Src::HSI48;
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} else {
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} else {
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config.rcc.clk48_src = Some(Clock48MhzSrc::PllQ);
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config.rcc.clk48_src = Clk48Src::PLL1_Q;
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}
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}
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let p = embassy_stm32::init(config);
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let p = embassy_stm32::init(config);
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