From a6c419d096bf2a4d14243fe90a7e2c1881b33fdf Mon Sep 17 00:00:00 2001 From: Bruno Bousquet <21108660+brunob45@users.noreply.github.com> Date: Tue, 28 May 2024 23:12:08 -0400 Subject: [PATCH] add f103 example for input_capture --- examples/stm32f1/.vscode/launch.json | 33 +++++++++++++++ examples/stm32f1/.vscode/tasks.json | 21 ++++++++++ examples/stm32f1/openocd.cfg | 5 +++ examples/stm32f1/openocd.gdb | 40 +++++++++++++++++++ .../src/bin/input_capture.rs} | 8 ++-- 5 files changed, 103 insertions(+), 4 deletions(-) create mode 100644 examples/stm32f1/.vscode/launch.json create mode 100644 examples/stm32f1/.vscode/tasks.json create mode 100644 examples/stm32f1/openocd.cfg create mode 100644 examples/stm32f1/openocd.gdb rename examples/{stm32f4/src/bin/pwm_input.rs => stm32f1/src/bin/input_capture.rs} (86%) diff --git a/examples/stm32f1/.vscode/launch.json b/examples/stm32f1/.vscode/launch.json new file mode 100644 index 000000000..7d1504a39 --- /dev/null +++ b/examples/stm32f1/.vscode/launch.json @@ -0,0 +1,33 @@ +{ + /* + * Requires the Rust Language Server (rust-analyzer) and Cortex-Debug extensions + * https://marketplace.visualstudio.com/items?itemName=rust-lang.rust-analyzer + * https://marketplace.visualstudio.com/items?itemName=marus25.cortex-debug + */ + "version": "0.2.0", + "configurations": [ + { + /* Configuration for the STM32F446 Discovery board */ + "type": "cortex-debug", + "request": "launch", + "name": "Debug (OpenOCD)", + "servertype": "openocd", + "cwd": "${workspaceRoot}", + "preLaunchTask": "Cargo Build (debug)", + "runToEntryPoint": "main", + "executable": "./target/thumbv7m-none-eabi/debug/input_capture", + /* Run `cargo build --example itm` and uncomment this line to run itm example */ + // "executable": "./target/thumbv7em-none-eabihf/debug/examples/itm", + "device": "STM32F103TB", + "configFiles": [ + "interface/stlink.cfg", + "target/stm32f1x.cfg" + ], + "postLaunchCommands": [ + "monitor arm semihosting enable" + ], + "postRestartCommands": [], + "postResetCommands": [], + } + ] +} \ No newline at end of file diff --git a/examples/stm32f1/.vscode/tasks.json b/examples/stm32f1/.vscode/tasks.json new file mode 100644 index 000000000..e153722da --- /dev/null +++ b/examples/stm32f1/.vscode/tasks.json @@ -0,0 +1,21 @@ +{ + "version": "2.0.0", + "tasks": [ + { + "type": "cargo", + "command": "build", + "problemMatcher": [ + "$rustc" + ], + "args": [ + "--bin", + "input_capture" + ], + "group": { + "kind": "build", + "isDefault": true + }, + "label": "Cargo Build (debug)", + } + ] +} \ No newline at end of file diff --git a/examples/stm32f1/openocd.cfg b/examples/stm32f1/openocd.cfg new file mode 100644 index 000000000..0325cd651 --- /dev/null +++ b/examples/stm32f1/openocd.cfg @@ -0,0 +1,5 @@ +# Sample OpenOCD configuration for the STM32F3DISCOVERY development board + +source [find interface/stlink.cfg] + +source [find target/stm32f1x.cfg] diff --git a/examples/stm32f1/openocd.gdb b/examples/stm32f1/openocd.gdb new file mode 100644 index 000000000..7795319fb --- /dev/null +++ b/examples/stm32f1/openocd.gdb @@ -0,0 +1,40 @@ +target extended-remote :3333 + +# print demangled symbols +set print asm-demangle on + +# set backtrace limit to not have infinite backtrace loops +set backtrace limit 32 + +# detect unhandled exceptions, hard faults and panics +break DefaultHandler +break HardFault +break rust_begin_unwind +# # run the next few lines so the panic message is printed immediately +# # the number needs to be adjusted for your panic handler +# commands $bpnum +# next 4 +# end + +# *try* to stop at the user entry point (it might be gone due to inlining) +break main + +monitor arm semihosting enable + +# # send captured ITM to the file itm.fifo +# # (the microcontroller SWO pin must be connected to the programmer SWO pin) +# # 8000000 must match the core clock frequency +# monitor tpiu config internal itm.txt uart off 8000000 + +# # OR: make the microcontroller SWO pin output compatible with UART (8N1) +# # 8000000 must match the core clock frequency +# # 2000000 is the frequency of the SWO pin +# monitor tpiu config external uart off 8000000 2000000 + +# # enable ITM port 0 +# monitor itm port 0 on + +load + +# start the process but immediately halt the processor +stepi diff --git a/examples/stm32f4/src/bin/pwm_input.rs b/examples/stm32f1/src/bin/input_capture.rs similarity index 86% rename from examples/stm32f4/src/bin/pwm_input.rs rename to examples/stm32f1/src/bin/input_capture.rs index 49de33d2b..417830231 100644 --- a/examples/stm32f4/src/bin/pwm_input.rs +++ b/examples/stm32f1/src/bin/input_capture.rs @@ -11,10 +11,10 @@ use embassy_stm32::{bind_interrupts, peripherals}; use embassy_time::Timer; use {defmt_rtt as _, panic_probe as _}; -/// Connect PB2 and PB10 with a 1k Ohm resistor +/// Connect PA2 and PC13 with a 1k Ohm resistor #[embassy_executor::task] -async fn blinky(led: peripherals::PB2) { +async fn blinky(led: peripherals::PC13) { let mut led = Output::new(led, Level::High, Speed::Low); loop { @@ -37,9 +37,9 @@ async fn main(spawner: Spawner) { let p = embassy_stm32::init(Default::default()); info!("Hello World!"); - unwrap!(spawner.spawn(blinky(p.PB2))); + unwrap!(spawner.spawn(blinky(p.PC13))); - let ch3 = CapturePin::new_ch3(p.PB10, Pull::None); + let ch3 = CapturePin::new_ch3(p.PA2, Pull::None); let mut ic = InputCapture::new(p.TIM2, None, None, Some(ch3), None, Irqs, khz(1000), Default::default()); loop {