stm32/sdmmc: remove DMA generic param.
This commit is contained in:
Dario Nieuwenhuis
parent
73ec3a7506
commit
9a0afa7bf4
@ -85,6 +85,18 @@ macro_rules! dma_trait_impl {
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};
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}
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#[allow(unused)]
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macro_rules! new_dma_nonopt {
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($name:ident) => {{
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let dma = $name.into_ref();
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let request = dma.request();
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crate::dma::ChannelAndRequest {
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channel: dma.map_into(),
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request,
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}
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}};
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}
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macro_rules! new_dma {
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($name:ident) => {{
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let dma = $name.into_ref();
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@ -12,7 +12,8 @@ use embassy_hal_internal::{into_ref, PeripheralRef};
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use embassy_sync::waitqueue::AtomicWaker;
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use sdio_host::{BusWidth, CardCapacity, CardStatus, CurrentState, SDStatus, CID, CSD, OCR, SCR};
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use crate::dma::NoDma;
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#[cfg(sdmmc_v1)]
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use crate::dma::ChannelAndRequest;
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#[cfg(gpio_v2)]
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use crate::gpio::Pull;
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use crate::gpio::{AfType, AnyPin, OutputType, SealedPin, Speed};
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@ -301,10 +302,10 @@ impl Default for Config {
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}
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/// Sdmmc device
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pub struct Sdmmc<'d, T: Instance, Dma: SdmmcDma<T> = NoDma> {
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pub struct Sdmmc<'d, T: Instance> {
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_peri: PeripheralRef<'d, T>,
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#[allow(unused)]
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dma: PeripheralRef<'d, Dma>,
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#[cfg(sdmmc_v1)]
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dma: ChannelAndRequest<'d>,
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clk: PeripheralRef<'d, AnyPin>,
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cmd: PeripheralRef<'d, AnyPin>,
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@ -334,18 +335,18 @@ const CMD_AF: AfType = AfType::output_pull(OutputType::PushPull, Speed::VeryHigh
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const DATA_AF: AfType = CMD_AF;
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#[cfg(sdmmc_v1)]
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impl<'d, T: Instance, Dma: SdmmcDma<T>> Sdmmc<'d, T, Dma> {
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impl<'d, T: Instance> Sdmmc<'d, T> {
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/// Create a new SDMMC driver, with 1 data lane.
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pub fn new_1bit(
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sdmmc: impl Peripheral<P = T> + 'd,
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_irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
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dma: impl Peripheral<P = Dma> + 'd,
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dma: impl Peripheral<P = impl SdmmcDma<T>> + 'd,
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clk: impl Peripheral<P = impl CkPin<T>> + 'd,
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cmd: impl Peripheral<P = impl CmdPin<T>> + 'd,
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d0: impl Peripheral<P = impl D0Pin<T>> + 'd,
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config: Config,
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) -> Self {
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into_ref!(clk, cmd, d0);
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into_ref!(dma, clk, cmd, d0);
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critical_section::with(|_| {
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clk.set_as_af(clk.af_num(), CLK_AF);
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@ -355,7 +356,7 @@ impl<'d, T: Instance, Dma: SdmmcDma<T>> Sdmmc<'d, T, Dma> {
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Self::new_inner(
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sdmmc,
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dma,
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new_dma_nonopt!(dma),
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clk.map_into(),
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cmd.map_into(),
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d0.map_into(),
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@ -370,7 +371,7 @@ impl<'d, T: Instance, Dma: SdmmcDma<T>> Sdmmc<'d, T, Dma> {
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pub fn new_4bit(
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sdmmc: impl Peripheral<P = T> + 'd,
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_irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
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dma: impl Peripheral<P = Dma> + 'd,
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dma: impl Peripheral<P = impl SdmmcDma<T>> + 'd,
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clk: impl Peripheral<P = impl CkPin<T>> + 'd,
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cmd: impl Peripheral<P = impl CmdPin<T>> + 'd,
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d0: impl Peripheral<P = impl D0Pin<T>> + 'd,
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@ -392,7 +393,7 @@ impl<'d, T: Instance, Dma: SdmmcDma<T>> Sdmmc<'d, T, Dma> {
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Self::new_inner(
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sdmmc,
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dma,
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new_dma_nonopt!(dma),
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clk.map_into(),
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cmd.map_into(),
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d0.map_into(),
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@ -405,7 +406,7 @@ impl<'d, T: Instance, Dma: SdmmcDma<T>> Sdmmc<'d, T, Dma> {
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}
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#[cfg(sdmmc_v2)]
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impl<'d, T: Instance> Sdmmc<'d, T, NoDma> {
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impl<'d, T: Instance> Sdmmc<'d, T> {
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/// Create a new SDMMC driver, with 1 data lane.
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pub fn new_1bit(
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sdmmc: impl Peripheral<P = T> + 'd,
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@ -425,7 +426,6 @@ impl<'d, T: Instance> Sdmmc<'d, T, NoDma> {
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Self::new_inner(
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sdmmc,
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NoDma.into_ref(),
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clk.map_into(),
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cmd.map_into(),
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d0.map_into(),
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@ -461,7 +461,6 @@ impl<'d, T: Instance> Sdmmc<'d, T, NoDma> {
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Self::new_inner(
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sdmmc,
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NoDma.into_ref(),
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clk.map_into(),
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cmd.map_into(),
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d0.map_into(),
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@ -473,10 +472,10 @@ impl<'d, T: Instance> Sdmmc<'d, T, NoDma> {
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}
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}
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impl<'d, T: Instance, Dma: SdmmcDma<T> + 'd> Sdmmc<'d, T, Dma> {
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impl<'d, T: Instance> Sdmmc<'d, T> {
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fn new_inner(
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sdmmc: impl Peripheral<P = T> + 'd,
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dma: impl Peripheral<P = Dma> + 'd,
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#[cfg(sdmmc_v1)] dma: ChannelAndRequest<'d>,
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clk: PeripheralRef<'d, AnyPin>,
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cmd: PeripheralRef<'d, AnyPin>,
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d0: PeripheralRef<'d, AnyPin>,
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@ -485,7 +484,7 @@ impl<'d, T: Instance, Dma: SdmmcDma<T> + 'd> Sdmmc<'d, T, Dma> {
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d3: Option<PeripheralRef<'d, AnyPin>>,
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config: Config,
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) -> Self {
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into_ref!(sdmmc, dma);
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into_ref!(sdmmc);
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rcc::enable_and_reset::<T>();
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@ -514,6 +513,7 @@ impl<'d, T: Instance, Dma: SdmmcDma<T> + 'd> Sdmmc<'d, T, Dma> {
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Self {
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_peri: sdmmc,
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#[cfg(sdmmc_v1)]
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dma,
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clk,
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@ -567,7 +567,7 @@ impl<'d, T: Instance, Dma: SdmmcDma<T> + 'd> Sdmmc<'d, T, Dma> {
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#[allow(unused_variables)]
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fn prepare_datapath_read<'a>(
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config: &Config,
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dma: &'a mut PeripheralRef<'d, Dma>,
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#[cfg(sdmmc_v1)] dma: &'a mut ChannelAndRequest<'d>,
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buffer: &'a mut [u32],
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length_bytes: u32,
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block_size: u8,
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@ -583,16 +583,7 @@ impl<'d, T: Instance, Dma: SdmmcDma<T> + 'd> Sdmmc<'d, T, Dma> {
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regs.dlenr().write(|w| w.set_datalength(length_bytes));
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#[cfg(sdmmc_v1)]
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let transfer = unsafe {
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let request = dma.request();
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Transfer::new_read(
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dma,
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request,
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regs.fifor().as_ptr() as *mut u32,
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buffer,
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DMA_TRANSFER_OPTIONS,
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)
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};
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let transfer = unsafe { dma.read(regs.fifor().as_ptr() as *mut u32, buffer, DMA_TRANSFER_OPTIONS) };
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#[cfg(sdmmc_v2)]
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let transfer = {
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regs.idmabase0r().write(|w| w.set_idmabase0(buffer.as_mut_ptr() as u32));
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@ -632,14 +623,8 @@ impl<'d, T: Instance, Dma: SdmmcDma<T> + 'd> Sdmmc<'d, T, Dma> {
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#[cfg(sdmmc_v1)]
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let transfer = unsafe {
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let request = self.dma.request();
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Transfer::new_write(
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&mut self.dma,
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request,
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buffer,
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regs.fifor().as_ptr() as *mut u32,
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DMA_TRANSFER_OPTIONS,
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)
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self.dma
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.write(buffer, regs.fifor().as_ptr() as *mut u32, DMA_TRANSFER_OPTIONS)
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};
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#[cfg(sdmmc_v2)]
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let transfer = {
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@ -735,7 +720,14 @@ impl<'d, T: Instance, Dma: SdmmcDma<T> + 'd> Sdmmc<'d, T, Dma> {
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let regs = T::regs();
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let on_drop = OnDrop::new(|| Self::on_drop());
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let transfer = Self::prepare_datapath_read(&self.config, &mut self.dma, status.as_mut(), 64, 6);
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let transfer = Self::prepare_datapath_read(
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&self.config,
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#[cfg(sdmmc_v1)]
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&mut self.dma,
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status.as_mut(),
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64,
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6,
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);
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InterruptHandler::<T>::data_interrupts(true);
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Self::cmd(Cmd::cmd6(set_function), true)?; // CMD6
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@ -821,7 +813,14 @@ impl<'d, T: Instance, Dma: SdmmcDma<T> + 'd> Sdmmc<'d, T, Dma> {
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let regs = T::regs();
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let on_drop = OnDrop::new(|| Self::on_drop());
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let transfer = Self::prepare_datapath_read(&self.config, &mut self.dma, status.as_mut(), 64, 6);
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let transfer = Self::prepare_datapath_read(
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&self.config,
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#[cfg(sdmmc_v1)]
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&mut self.dma,
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status.as_mut(),
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64,
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6,
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);
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InterruptHandler::<T>::data_interrupts(true);
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Self::cmd(Cmd::card_status(0), true)?;
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@ -924,7 +923,14 @@ impl<'d, T: Instance, Dma: SdmmcDma<T> + 'd> Sdmmc<'d, T, Dma> {
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let regs = T::regs();
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let on_drop = OnDrop::new(|| Self::on_drop());
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let transfer = Self::prepare_datapath_read(&self.config, &mut self.dma, scr, 8, 3);
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let transfer = Self::prepare_datapath_read(
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&self.config,
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#[cfg(sdmmc_v1)]
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&mut self.dma,
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scr,
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8,
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3,
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);
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InterruptHandler::<T>::data_interrupts(true);
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Self::cmd(Cmd::cmd51(), true)?;
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@ -1214,7 +1220,14 @@ impl<'d, T: Instance, Dma: SdmmcDma<T> + 'd> Sdmmc<'d, T, Dma> {
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let regs = T::regs();
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let on_drop = OnDrop::new(|| Self::on_drop());
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let transfer = Self::prepare_datapath_read(&self.config, &mut self.dma, buffer, 512, 9);
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let transfer = Self::prepare_datapath_read(
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&self.config,
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#[cfg(sdmmc_v1)]
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&mut self.dma,
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buffer,
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512,
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9,
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);
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InterruptHandler::<T>::data_interrupts(true);
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Self::cmd(Cmd::read_single_block(address), true)?;
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@ -1347,7 +1360,7 @@ impl<'d, T: Instance, Dma: SdmmcDma<T> + 'd> Sdmmc<'d, T, Dma> {
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}
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}
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impl<'d, T: Instance, Dma: SdmmcDma<T> + 'd> Drop for Sdmmc<'d, T, Dma> {
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impl<'d, T: Instance> Drop for Sdmmc<'d, T> {
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fn drop(&mut self) {
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T::Interrupt::disable();
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Self::on_drop();
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@ -1484,15 +1497,6 @@ pin_trait!(D7Pin, Instance);
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#[cfg(sdmmc_v1)]
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dma_trait!(SdmmcDma, Instance);
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/// DMA instance trait.
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///
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/// This is only implemented for `NoDma`, since SDMMCv2 has DMA built-in, instead of
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/// using ST's system-wide DMA peripheral.
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#[cfg(sdmmc_v2)]
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pub trait SdmmcDma<T: Instance> {}
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#[cfg(sdmmc_v2)]
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impl<T: Instance> SdmmcDma<T> for NoDma {}
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foreach_peripheral!(
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(sdmmc, $inst:ident) => {
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impl SealedInstance for peripherals::$inst {
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@ -1512,7 +1516,7 @@ foreach_peripheral!(
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};
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);
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impl<'d, T: Instance, Dma: SdmmcDma<T> + 'd> block_device_driver::BlockDevice<512> for Sdmmc<'d, T, Dma> {
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impl<'d, T: Instance> block_device_driver::BlockDevice<512> for Sdmmc<'d, T> {
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type Error = Error;
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type Align = aligned::A4;
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