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stm32: flash: fix flash erase on stm32f3xx series

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STM32F3xx series also needs a wait of at least one clock cycle before
reading the BSY bit during a flash erase - previously this was only
applied to STM32F1xx series.
This commit is contained in:
Matt Rodgers 2025-01-08 10:11:25 +00:00
parent 06869e2e85
commit 844d3b38de
1 changed files with 2 additions and 2 deletions
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embassy-stm32/src/flash/f1f3.rs
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@ -64,8 +64,8 @@ pub(crate) unsafe fn blocking_erase_sector(sector: &FlashSector) -> Result<(), E
// BSY bit, because there is a one-cycle delay between // BSY bit, because there is a one-cycle delay between
// setting the STRT bit and the BSY bit being asserted // setting the STRT bit and the BSY bit being asserted
// by hardware. See STM32F105xx, STM32F107xx device errata, // by hardware. See STM32F105xx, STM32F107xx device errata,
// section 2.2.8 // section 2.2.8, and also RM0316 Rev 10 section 4.2.3 for
#[cfg(stm32f1)] // STM32F3xx series.
pac::FLASH.cr().read(); pac::FLASH.cr().read();
let mut ret: Result<(), Error> = wait_ready_blocking(); let mut ret: Result<(), Error> = wait_ready_blocking();