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Merge #647

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647: Stm32 dma error handling r=Dirbaio a=Dirbaio



Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
This commit is contained in:
bors[bot] 2022-03-09 02:35:56 +00:00 committed by GitHub
commit 828cdb2951
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2 changed files with 12 additions and 0 deletions
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6
embassy-stm32/src/dma/bdma.rs
View File

@ -238,6 +238,12 @@ mod low_level_api {
let isr = dma.isr().read(); let isr = dma.isr().read();
let cr = dma.ch(channel_num).cr(); let cr = dma.ch(channel_num).cr();
if isr.teif(channel_num) {
panic!(
"DMA: error on BDMA@{:08x} channel {}",
dma.0 as u32, channel_num
);
}
if isr.tcif(channel_num) && cr.read().tcie() { if isr.tcif(channel_num) && cr.read().tcie() {
cr.write(|_| ()); // Disable channel interrupts with the default value. cr.write(|_| ()); // Disable channel interrupts with the default value.
STATE.ch_wakers[index].wake(); STATE.ch_wakers[index].wake();

6
embassy-stm32/src/dma/dma.rs
View File

@ -239,6 +239,12 @@ mod low_level_api {
let cr = dma.st(channel_num).cr(); let cr = dma.st(channel_num).cr();
let isr = dma.isr(channel_num / 4).read(); let isr = dma.isr(channel_num / 4).read();
if isr.teif(channel_num % 4) {
panic!(
"DMA: error on DMA@{:08x} channel {}",
dma.0 as u32, channel_num
);
}
if isr.tcif(channel_num % 4) && cr.read().tcie() { if isr.tcif(channel_num % 4) && cr.read().tcie() {
cr.write(|_| ()); // Disable channel interrupts with the default value. cr.write(|_| ()); // Disable channel interrupts with the default value.
STATE.ch_wakers[index].wake(); STATE.ch_wakers[index].wake();