commit
7d9d2f8459
@ -347,24 +347,32 @@ impl<'d> Pwm<'d> {
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#[inline]
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#[inline]
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/// Split Pwm driver to allow separate duty cycle control of each channel
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/// Split Pwm driver to allow separate duty cycle control of each channel
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pub fn split(self) -> (Option<PwmOutput>, Option<PwmOutput>) {
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pub fn split(mut self) -> (Option<PwmOutput<'d>>, Option<PwmOutput<'d>>) {
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(
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let pwm_output_a = if let Some(pin_a) = self.pin_a {
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self.pin_a
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Some(PwmOutput::new(PwmChannelPin::A(pin_a), self.slice.clone()))
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.take()
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};
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.map(|pin| PwmOutput::new(PwmChannelPin::A(pin), self.slice.clone(), true)),
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self.pin_b
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let pwm_output_b = if let Some(pin_b) = self.pin_b {
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.take()
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Some(PwmOutput::new(PwmChannelPin::B(pin_b), self.slice.clone()))
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.map(|pin| PwmOutput::new(PwmChannelPin::B(pin), self.slice.clone(), true)),
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};
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)
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(pwm_output_a,pwm_output_b)
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}
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}
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pub fn split_by_ref(&mut self) -> (Option<PwmOutput<'_>>, Option<PwmOutput<'_>>) {
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(
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self.pin_a
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.as_mut()
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.map(|pin| PwmOutput::new(PwmChannelPin::A(pin.reborrow()), self.slice.clone(), false)),
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self.pin_b
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.as_mut()
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.map(|pin| PwmOutput::new(PwmChannelPin::B(pin.reborrow()), self.slice.clone(), false)),
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)
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}
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}
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}
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enum PwmChannelPin<'d> {
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enum PwmChannelPin<'d> {
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A(PeripheralRef<'d, AnyPin>),
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A(PeripheralRef<'d, AnyPin>),
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B(PeripheralRef<'d, AnyPin>)
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B(PeripheralRef<'d, AnyPin>),
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}
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}
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/// Single channel of Pwm driver.
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/// Single channel of Pwm driver.
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@ -372,15 +380,51 @@ pub struct PwmOutput<'d> {
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//pin that can be ether ChannelAPin or ChannelBPin
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//pin that can be ether ChannelAPin or ChannelBPin
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channel_pin: PwmChannelPin<'d>,
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channel_pin: PwmChannelPin<'d>,
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slice: usize,
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slice: usize,
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is_owned: bool,
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}
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}
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impl<'d> PwmOutput<'d> {
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impl<'d> PwmOutput<'d> {
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fn new(channel_pin: PwmChannelPin<'d>, slice: usize) -> Self {
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fn new(channel_pin: PwmChannelPin<'d>, slice: usize, is_owned: bool) -> Self {
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Self { channel_pin ,slice }
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Self {
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channel_pin,
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slice,
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is_owned,
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}
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}
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}
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}
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}
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impl ErrorType for PwmOutput {
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impl<'d> Drop for PwmOutput<'d> {
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fn drop(&mut self) {
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if self.is_owned {
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let p = pac::PWM.ch(self.slice);
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match &self.channel_pin {
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PwmChannelPin::A(pin) => {
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p.cc().modify(|w| {
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w.set_a(0);
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});
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pin.gpio().ctrl().write(|w| w.set_funcsel(31));
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///Enable pin PULL-DOWN
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pin.pad_ctrl().modify(|w| {
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w.set_pde(true);
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});
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}
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PwmChannelPin::B(pin) => {
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p.cc().modify(|w| {
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w.set_b(0);
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});
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pin.gpio().ctrl().write(|w| w.set_funcsel(31));
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///Enable pin PULL-DOWN
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pin.pad_ctrl().modify(|w| {
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w.set_pde(true);
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});
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}
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}
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}
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}
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}
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impl<'d> ErrorType for PwmOutput<'d> {
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type Error = PwmError;
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type Error = PwmError;
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}
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}
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@ -397,12 +441,12 @@ impl<'d> SetDutyCycle for PwmOutput<'d> {
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let p = pac::PWM.ch(self.slice);
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let p = pac::PWM.ch(self.slice);
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match self.channel_pin {
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match self.channel_pin {
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PwmChannelPin::A => {
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PwmChannelPin::A(_) => {
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p.cc().modify(|w| {
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p.cc().modify(|w| {
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w.set_a(duty);
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w.set_a(duty);
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});
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});
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}
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}
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PwmChannelPin::B => {
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PwmChannelPin::B(_) => {
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p.cc().modify(|w| {
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p.cc().modify(|w| {
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w.set_b(duty);
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w.set_b(duty);
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});
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});
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