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Scale clock dividers in HD44780, rotary encoder, and stepper driver based on system clock frequency

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This commit is contained in:
1-rafael-1 2025-04-26 21:54:48 +02:00
parent 4ce3bdb370
commit 713d6291d5
3 changed files with 23 additions and 5 deletions
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15
embassy-rp/src/pio_programs/hd44780.rs
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@ -1,5 +1,6 @@
//! [HD44780 display driver](https://www.sparkfun.com/datasheets/LCD/HD44780.pdf)
use crate::clocks::clk_sys_freq;
use crate::dma::{AnyChannel, Channel};
use crate::pio::{
Common, Config, Direction, FifoJoin, Instance, Irq, LoadedProgram, PioPin, ShiftConfig, ShiftDirection,
@ -134,7 +135,12 @@ impl<'l, P: Instance, const S: usize> PioHD44780<'l, P, S> {
let mut cfg = Config::default();
cfg.use_program(&word_prg.prg, &[&e]);
cfg.clock_divider = 125u8.into();
// Scale the divider based on system clock frequency
// Original: 125 at 125 MHz (1 MHz PIO clock)
let word_divider = (clk_sys_freq() / 1_000_000) as u8; // Target 1 MHz PIO clock
cfg.clock_divider = word_divider.into();
cfg.set_out_pins(&[&db4, &db5, &db6, &db7]);
cfg.shift_out = ShiftConfig {
auto_fill: true,
@ -160,7 +166,12 @@ impl<'l, P: Instance, const S: usize> PioHD44780<'l, P, S> {
let mut cfg = Config::default();
cfg.use_program(&seq_prg.prg, &[&e]);
cfg.clock_divider = 8u8.into(); // ~64ns/insn
// Original: 8 at 125 MHz (~15.6 MHz PIO clock)
// Comment says ~64ns/insn which is 1/(15.6 MHz) = ~64ns
let seq_divider = (clk_sys_freq() / 15_600_000) as u8; // Target ~15.6 MHz PIO clock (~64ns/insn)
cfg.clock_divider = seq_divider.into();
cfg.set_jmp_pin(&db7);
cfg.set_set_pins(&[&rs, &rw]);
cfg.set_out_pins(&[&db4, &db5, &db6, &db7]);

8
embassy-rp/src/pio_programs/rotary_encoder.rs
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@ -2,6 +2,7 @@
use fixed::traits::ToFixed;
use crate::clocks::clk_sys_freq;
use crate::gpio::Pull;
use crate::pio::{
Common, Config, Direction as PioDirection, FifoJoin, Instance, LoadedProgram, PioPin, ShiftDirection, StateMachine,
@ -48,7 +49,12 @@ impl<'d, T: Instance, const SM: usize> PioEncoder<'d, T, SM> {
cfg.set_in_pins(&[&pin_a, &pin_b]);
cfg.fifo_join = FifoJoin::RxOnly;
cfg.shift_in.direction = ShiftDirection::Left;
cfg.clock_divider = 10_000.to_fixed();
// Original: 10_000 at 125 MHz (12.5 KHz PIO clock)
// Scale divider to maintain same PIO clock frequency at different system clocks
let divider = (clk_sys_freq() as f32 / 12_500.0).to_fixed();
cfg.clock_divider = divider;
cfg.use_program(&program.prg, &[]);
sm.set_config(&cfg);
sm.set_enable(true);

5
embassy-rp/src/pio_programs/stepper.rs
View File

@ -6,6 +6,7 @@ use fixed::traits::ToFixed;
use fixed::types::extra::U8;
use fixed::FixedU32;
use crate::clocks::clk_sys_freq;
use crate::pio::{Common, Config, Direction, Instance, Irq, LoadedProgram, PioPin, StateMachine};
use crate::Peri;
@ -64,7 +65,7 @@ impl<'d, T: Instance, const SM: usize> PioStepper<'d, T, SM> {
sm.set_pin_dirs(Direction::Out, &[&pin0, &pin1, &pin2, &pin3]);
let mut cfg = Config::default();
cfg.set_out_pins(&[&pin0, &pin1, &pin2, &pin3]);
cfg.clock_divider = (125_000_000 / (100 * 136)).to_fixed();
cfg.clock_divider = (clk_sys_freq() / (100 * 136)).to_fixed();
cfg.use_program(&program.prg, &[]);
sm.set_config(&cfg);
sm.set_enable(true);
@ -73,7 +74,7 @@ impl<'d, T: Instance, const SM: usize> PioStepper<'d, T, SM> {
/// Set pulse frequency
pub fn set_frequency(&mut self, freq: u32) {
let clock_divider: FixedU32<U8> = (125_000_000 / (freq * 136)).to_fixed();
let clock_divider: FixedU32<U8> = (clk_sys_freq() / (freq * 136)).to_fixed();
assert!(clock_divider <= 65536, "clkdiv must be <= 65536");
assert!(clock_divider >= 1, "clkdiv must be >= 1");
self.sm.set_clock_divider(clock_divider);