Merge pull request #4268 from Willdew/stm32-fix-ringbuffered-adc-set-sq

[embassy-stm32] Fixed runtime assertion failure on more the 6 ringbuffered ADC channels
This commit is contained in:
Dario Nieuwenhuis 2025-05-30 11:12:50 +00:00 committed by GitHub
commit 675dd81a0f
No known key found for this signature in database
GPG Key ID: B5690EEEBB952194

View File

@ -199,16 +199,16 @@ impl<'d, T: Instance> RingBufferedAdc<'d, T> {
Sequence::Four => T::regs().sqr3().modify(|w| w.set_sq(3, channel.channel())), Sequence::Four => T::regs().sqr3().modify(|w| w.set_sq(3, channel.channel())),
Sequence::Five => T::regs().sqr3().modify(|w| w.set_sq(4, channel.channel())), Sequence::Five => T::regs().sqr3().modify(|w| w.set_sq(4, channel.channel())),
Sequence::Six => T::regs().sqr3().modify(|w| w.set_sq(5, channel.channel())), Sequence::Six => T::regs().sqr3().modify(|w| w.set_sq(5, channel.channel())),
Sequence::Seven => T::regs().sqr2().modify(|w| w.set_sq(6, channel.channel())), Sequence::Seven => T::regs().sqr2().modify(|w| w.set_sq(0, channel.channel())),
Sequence::Eight => T::regs().sqr2().modify(|w| w.set_sq(7, channel.channel())), Sequence::Eight => T::regs().sqr2().modify(|w| w.set_sq(1, channel.channel())),
Sequence::Nine => T::regs().sqr2().modify(|w| w.set_sq(8, channel.channel())), Sequence::Nine => T::regs().sqr2().modify(|w| w.set_sq(2, channel.channel())),
Sequence::Ten => T::regs().sqr2().modify(|w| w.set_sq(9, channel.channel())), Sequence::Ten => T::regs().sqr2().modify(|w| w.set_sq(3, channel.channel())),
Sequence::Eleven => T::regs().sqr2().modify(|w| w.set_sq(10, channel.channel())), Sequence::Eleven => T::regs().sqr2().modify(|w| w.set_sq(4, channel.channel())),
Sequence::Twelve => T::regs().sqr2().modify(|w| w.set_sq(11, channel.channel())), Sequence::Twelve => T::regs().sqr2().modify(|w| w.set_sq(5, channel.channel())),
Sequence::Thirteen => T::regs().sqr1().modify(|w| w.set_sq(12, channel.channel())), Sequence::Thirteen => T::regs().sqr1().modify(|w| w.set_sq(0, channel.channel())),
Sequence::Fourteen => T::regs().sqr1().modify(|w| w.set_sq(13, channel.channel())), Sequence::Fourteen => T::regs().sqr1().modify(|w| w.set_sq(1, channel.channel())),
Sequence::Fifteen => T::regs().sqr1().modify(|w| w.set_sq(14, channel.channel())), Sequence::Fifteen => T::regs().sqr1().modify(|w| w.set_sq(2, channel.channel())),
Sequence::Sixteen => T::regs().sqr1().modify(|w| w.set_sq(15, channel.channel())), Sequence::Sixteen => T::regs().sqr1().modify(|w| w.set_sq(3, channel.channel())),
}; };
if !was_on { if !was_on {