stm32: xspi update for Peri
This commit is contained in:
Matt Johnston
parent
36a5b02774
commit
65f849a589
@ -8,7 +8,7 @@ pub mod enums;
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use core::marker::PhantomData;
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use core::marker::PhantomData;
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use embassy_embedded_hal::{GetConfig, SetConfig};
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use embassy_embedded_hal::{GetConfig, SetConfig};
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use embassy_hal_internal::{into_ref, PeripheralRef};
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use embassy_hal_internal::PeripheralType;
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pub use enums::*;
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pub use enums::*;
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use crate::dma::{word, ChannelAndRequest};
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use crate::dma::{word, ChannelAndRequest};
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@ -19,7 +19,7 @@ use crate::pac::xspi::Xspi as Regs;
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#[cfg(xspim_v1)]
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#[cfg(xspim_v1)]
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use crate::pac::xspim::Xspim;
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use crate::pac::xspim::Xspim;
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use crate::rcc::{self, RccPeripheral};
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use crate::rcc::{self, RccPeripheral};
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use crate::{peripherals, Peripheral};
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use crate::{peripherals, Peri};
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/// XPSI driver config.
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/// XPSI driver config.
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#[derive(Clone, Copy)]
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#[derive(Clone, Copy)]
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@ -157,28 +157,28 @@ pub enum XspiError {
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/// XSPI driver.
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/// XSPI driver.
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pub struct Xspi<'d, T: Instance, M: PeriMode> {
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pub struct Xspi<'d, T: Instance, M: PeriMode> {
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_peri: PeripheralRef<'d, T>,
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_peri: Peri<'d, T>,
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clk: Option<PeripheralRef<'d, AnyPin>>,
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clk: Option<Peri<'d, AnyPin>>,
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d0: Option<PeripheralRef<'d, AnyPin>>,
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d0: Option<Peri<'d, AnyPin>>,
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d1: Option<PeripheralRef<'d, AnyPin>>,
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d1: Option<Peri<'d, AnyPin>>,
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d2: Option<PeripheralRef<'d, AnyPin>>,
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d2: Option<Peri<'d, AnyPin>>,
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d3: Option<PeripheralRef<'d, AnyPin>>,
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d3: Option<Peri<'d, AnyPin>>,
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d4: Option<PeripheralRef<'d, AnyPin>>,
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d4: Option<Peri<'d, AnyPin>>,
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d5: Option<PeripheralRef<'d, AnyPin>>,
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d5: Option<Peri<'d, AnyPin>>,
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d6: Option<PeripheralRef<'d, AnyPin>>,
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d6: Option<Peri<'d, AnyPin>>,
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d7: Option<PeripheralRef<'d, AnyPin>>,
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d7: Option<Peri<'d, AnyPin>>,
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d8: Option<PeripheralRef<'d, AnyPin>>,
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d8: Option<Peri<'d, AnyPin>>,
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d9: Option<PeripheralRef<'d, AnyPin>>,
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d9: Option<Peri<'d, AnyPin>>,
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d10: Option<PeripheralRef<'d, AnyPin>>,
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d10: Option<Peri<'d, AnyPin>>,
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d11: Option<PeripheralRef<'d, AnyPin>>,
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d11: Option<Peri<'d, AnyPin>>,
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d12: Option<PeripheralRef<'d, AnyPin>>,
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d12: Option<Peri<'d, AnyPin>>,
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d13: Option<PeripheralRef<'d, AnyPin>>,
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d13: Option<Peri<'d, AnyPin>>,
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d14: Option<PeripheralRef<'d, AnyPin>>,
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d14: Option<Peri<'d, AnyPin>>,
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d15: Option<PeripheralRef<'d, AnyPin>>,
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d15: Option<Peri<'d, AnyPin>>,
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ncs1: Option<PeripheralRef<'d, AnyPin>>,
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ncs1: Option<Peri<'d, AnyPin>>,
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ncs2: Option<PeripheralRef<'d, AnyPin>>,
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ncs2: Option<Peri<'d, AnyPin>>,
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dqs0: Option<PeripheralRef<'d, AnyPin>>,
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dqs0: Option<Peri<'d, AnyPin>>,
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dqs1: Option<PeripheralRef<'d, AnyPin>>,
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dqs1: Option<Peri<'d, AnyPin>>,
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dma: Option<ChannelAndRequest<'d>>,
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dma: Option<ChannelAndRequest<'d>>,
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_phantom: PhantomData<M>,
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_phantom: PhantomData<M>,
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config: Config,
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config: Config,
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@ -251,35 +251,33 @@ impl<'d, T: Instance, M: PeriMode> Xspi<'d, T, M> {
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}
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}
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fn new_inner(
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fn new_inner(
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peri: impl Peripheral<P = T> + 'd,
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peri: Peri<'d, T>,
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d0: Option<PeripheralRef<'d, AnyPin>>,
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d0: Option<Peri<'d, AnyPin>>,
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d1: Option<PeripheralRef<'d, AnyPin>>,
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d1: Option<Peri<'d, AnyPin>>,
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d2: Option<PeripheralRef<'d, AnyPin>>,
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d2: Option<Peri<'d, AnyPin>>,
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d3: Option<PeripheralRef<'d, AnyPin>>,
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d3: Option<Peri<'d, AnyPin>>,
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d4: Option<PeripheralRef<'d, AnyPin>>,
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d4: Option<Peri<'d, AnyPin>>,
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d5: Option<PeripheralRef<'d, AnyPin>>,
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d5: Option<Peri<'d, AnyPin>>,
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d6: Option<PeripheralRef<'d, AnyPin>>,
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d6: Option<Peri<'d, AnyPin>>,
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d7: Option<PeripheralRef<'d, AnyPin>>,
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d7: Option<Peri<'d, AnyPin>>,
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d8: Option<PeripheralRef<'d, AnyPin>>,
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d8: Option<Peri<'d, AnyPin>>,
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d9: Option<PeripheralRef<'d, AnyPin>>,
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d9: Option<Peri<'d, AnyPin>>,
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d10: Option<PeripheralRef<'d, AnyPin>>,
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d10: Option<Peri<'d, AnyPin>>,
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d11: Option<PeripheralRef<'d, AnyPin>>,
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d11: Option<Peri<'d, AnyPin>>,
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d12: Option<PeripheralRef<'d, AnyPin>>,
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d12: Option<Peri<'d, AnyPin>>,
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d13: Option<PeripheralRef<'d, AnyPin>>,
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d13: Option<Peri<'d, AnyPin>>,
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d14: Option<PeripheralRef<'d, AnyPin>>,
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d14: Option<Peri<'d, AnyPin>>,
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d15: Option<PeripheralRef<'d, AnyPin>>,
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d15: Option<Peri<'d, AnyPin>>,
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clk: Option<PeripheralRef<'d, AnyPin>>,
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clk: Option<Peri<'d, AnyPin>>,
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ncs1: Option<PeripheralRef<'d, AnyPin>>,
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ncs1: Option<Peri<'d, AnyPin>>,
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ncs2: Option<PeripheralRef<'d, AnyPin>>,
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ncs2: Option<Peri<'d, AnyPin>>,
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dqs0: Option<PeripheralRef<'d, AnyPin>>,
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dqs0: Option<Peri<'d, AnyPin>>,
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dqs1: Option<PeripheralRef<'d, AnyPin>>,
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dqs1: Option<Peri<'d, AnyPin>>,
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dma: Option<ChannelAndRequest<'d>>,
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dma: Option<ChannelAndRequest<'d>>,
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config: Config,
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config: Config,
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width: XspiWidth,
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width: XspiWidth,
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dual_quad: bool,
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dual_quad: bool,
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) -> Self {
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) -> Self {
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into_ref!(peri);
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#[cfg(xspim_v1)]
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#[cfg(xspim_v1)]
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{
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{
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// RCC for xspim should be enabled before writing register
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// RCC for xspim should be enabled before writing register
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@ -656,11 +654,11 @@ impl<'d, T: Instance, M: PeriMode> Xspi<'d, T, M> {
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impl<'d, T: Instance> Xspi<'d, T, Blocking> {
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impl<'d, T: Instance> Xspi<'d, T, Blocking> {
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/// Create new blocking XSPI driver for a single spi external chip
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/// Create new blocking XSPI driver for a single spi external chip
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pub fn new_blocking_singlespi(
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pub fn new_blocking_singlespi(
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peri: impl Peripheral<P = T> + 'd,
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peri: Peri<'d, T>,
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clk: impl Peripheral<P = impl CLKPin<T>> + 'd,
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clk: Peri<'d, impl CLKPin<T>>,
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d0: impl Peripheral<P = impl D0Pin<T>> + 'd,
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d0: Peri<'d, impl D0Pin<T>>,
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d1: impl Peripheral<P = impl D1Pin<T>> + 'd,
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d1: Peri<'d, impl D1Pin<T>>,
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ncs: impl Peripheral<P = impl NCS1Pin<T>> + 'd,
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ncs: Peri<'d, impl NCS1Pin<T>>,
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config: Config,
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config: Config,
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) -> Self {
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) -> Self {
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Self::new_inner(
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Self::new_inner(
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@ -695,11 +693,11 @@ impl<'d, T: Instance> Xspi<'d, T, Blocking> {
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/// Create new blocking XSPI driver for a dualspi external chip
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/// Create new blocking XSPI driver for a dualspi external chip
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pub fn new_blocking_dualspi(
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pub fn new_blocking_dualspi(
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peri: impl Peripheral<P = T> + 'd,
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peri: Peri<'d, T>,
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clk: impl Peripheral<P = impl CLKPin<T>> + 'd,
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clk: Peri<'d, impl CLKPin<T>>,
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d0: impl Peripheral<P = impl D0Pin<T>> + 'd,
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d0: Peri<'d, impl D0Pin<T>>,
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d1: impl Peripheral<P = impl D1Pin<T>> + 'd,
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d1: Peri<'d, impl D1Pin<T>>,
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ncs: impl Peripheral<P = impl NCS1Pin<T>> + 'd,
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ncs: Peri<'d, impl NCS1Pin<T>>,
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config: Config,
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config: Config,
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) -> Self {
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) -> Self {
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Self::new_inner(
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Self::new_inner(
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@ -737,13 +735,13 @@ impl<'d, T: Instance> Xspi<'d, T, Blocking> {
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/// Create new blocking XSPI driver for a quadspi external chip
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/// Create new blocking XSPI driver for a quadspi external chip
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pub fn new_blocking_quadspi(
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pub fn new_blocking_quadspi(
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peri: impl Peripheral<P = T> + 'd,
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peri: Peri<'d, T>,
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clk: impl Peripheral<P = impl CLKPin<T>> + 'd,
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clk: Peri<'d, impl CLKPin<T>>,
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d0: impl Peripheral<P = impl D0Pin<T>> + 'd,
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d0: Peri<'d, impl D0Pin<T>>,
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d1: impl Peripheral<P = impl D1Pin<T>> + 'd,
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d1: Peri<'d, impl D1Pin<T>>,
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d2: impl Peripheral<P = impl D2Pin<T>> + 'd,
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d2: Peri<'d, impl D2Pin<T>>,
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d3: impl Peripheral<P = impl D3Pin<T>> + 'd,
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d3: Peri<'d, impl D3Pin<T>>,
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ncs: impl Peripheral<P = impl NCS1Pin<T>> + 'd,
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ncs: Peri<'d, impl NCS1Pin<T>>,
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config: Config,
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config: Config,
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) -> Self {
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) -> Self {
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Self::new_inner(
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Self::new_inner(
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@ -781,17 +779,17 @@ impl<'d, T: Instance> Xspi<'d, T, Blocking> {
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/// Create new blocking XSPI driver for two quadspi external chips
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/// Create new blocking XSPI driver for two quadspi external chips
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pub fn new_blocking_dualquadspi(
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pub fn new_blocking_dualquadspi(
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peri: impl Peripheral<P = T> + 'd,
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peri: Peri<'d, T>,
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clk: impl Peripheral<P = impl CLKPin<T>> + 'd,
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clk: Peri<'d, impl CLKPin<T>>,
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d0: impl Peripheral<P = impl D0Pin<T>> + 'd,
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d0: Peri<'d, impl D0Pin<T>>,
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d1: impl Peripheral<P = impl D1Pin<T>> + 'd,
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d1: Peri<'d, impl D1Pin<T>>,
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d2: impl Peripheral<P = impl D2Pin<T>> + 'd,
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d2: Peri<'d, impl D2Pin<T>>,
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d3: impl Peripheral<P = impl D3Pin<T>> + 'd,
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d3: Peri<'d, impl D3Pin<T>>,
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d4: impl Peripheral<P = impl D4Pin<T>> + 'd,
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d4: Peri<'d, impl D4Pin<T>>,
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d5: impl Peripheral<P = impl D5Pin<T>> + 'd,
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d5: Peri<'d, impl D5Pin<T>>,
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d6: impl Peripheral<P = impl D6Pin<T>> + 'd,
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d6: Peri<'d, impl D6Pin<T>>,
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d7: impl Peripheral<P = impl D7Pin<T>> + 'd,
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d7: Peri<'d, impl D7Pin<T>>,
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ncs: impl Peripheral<P = impl NCS1Pin<T>> + 'd,
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ncs: Peri<'d, impl NCS1Pin<T>>,
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config: Config,
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config: Config,
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) -> Self {
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) -> Self {
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Self::new_inner(
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Self::new_inner(
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@ -829,17 +827,17 @@ impl<'d, T: Instance> Xspi<'d, T, Blocking> {
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/// Create new blocking XSPI driver for xspi external chips
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/// Create new blocking XSPI driver for xspi external chips
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pub fn new_blocking_xspi(
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pub fn new_blocking_xspi(
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peri: impl Peripheral<P = T> + 'd,
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peri: Peri<'d, T>,
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clk: impl Peripheral<P = impl CLKPin<T>> + 'd,
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clk: Peri<'d, impl CLKPin<T>>,
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d0: impl Peripheral<P = impl D0Pin<T>> + 'd,
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d0: Peri<'d, impl D0Pin<T>>,
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d1: impl Peripheral<P = impl D1Pin<T>> + 'd,
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d1: Peri<'d, impl D1Pin<T>>,
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d2: impl Peripheral<P = impl D2Pin<T>> + 'd,
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d2: Peri<'d, impl D2Pin<T>>,
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d3: impl Peripheral<P = impl D3Pin<T>> + 'd,
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d3: Peri<'d, impl D3Pin<T>>,
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d4: impl Peripheral<P = impl D4Pin<T>> + 'd,
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d4: Peri<'d, impl D4Pin<T>>,
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d5: impl Peripheral<P = impl D5Pin<T>> + 'd,
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d5: Peri<'d, impl D5Pin<T>>,
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d6: impl Peripheral<P = impl D6Pin<T>> + 'd,
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d6: Peri<'d, impl D6Pin<T>>,
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d7: impl Peripheral<P = impl D7Pin<T>> + 'd,
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d7: Peri<'d, impl D7Pin<T>>,
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ncs: impl Peripheral<P = impl NCS1Pin<T>> + 'd,
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ncs: Peri<'d, impl NCS1Pin<T>>,
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config: Config,
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config: Config,
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) -> Self {
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) -> Self {
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Self::new_inner(
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Self::new_inner(
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@ -879,12 +877,12 @@ impl<'d, T: Instance> Xspi<'d, T, Blocking> {
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impl<'d, T: Instance> Xspi<'d, T, Async> {
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impl<'d, T: Instance> Xspi<'d, T, Async> {
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/// Create new blocking XSPI driver for a single spi external chip
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/// Create new blocking XSPI driver for a single spi external chip
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pub fn new_singlespi(
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pub fn new_singlespi(
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peri: impl Peripheral<P = T> + 'd,
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peri: Peri<'d, T>,
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clk: impl Peripheral<P = impl CLKPin<T>> + 'd,
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clk: Peri<'d, impl CLKPin<T>>,
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d0: impl Peripheral<P = impl D0Pin<T>> + 'd,
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d0: Peri<'d, impl D0Pin<T>>,
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d1: impl Peripheral<P = impl D1Pin<T>> + 'd,
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d1: Peri<'d, impl D1Pin<T>>,
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ncs: impl Peripheral<P = impl NCS1Pin<T>> + 'd,
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ncs: Peri<'d, impl NCS1Pin<T>>,
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dma: impl Peripheral<P = impl XDma<T>> + 'd,
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dma: Peri<'d, impl XDma<T>>,
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config: Config,
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config: Config,
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) -> Self {
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) -> Self {
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Self::new_inner(
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Self::new_inner(
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@ -919,12 +917,12 @@ impl<'d, T: Instance> Xspi<'d, T, Async> {
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/// Create new blocking XSPI driver for a dualspi external chip
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/// Create new blocking XSPI driver for a dualspi external chip
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pub fn new_dualspi(
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pub fn new_dualspi(
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peri: impl Peripheral<P = T> + 'd,
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peri: Peri<'d, T>,
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clk: impl Peripheral<P = impl CLKPin<T>> + 'd,
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clk: Peri<'d, impl CLKPin<T>>,
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d0: impl Peripheral<P = impl D0Pin<T>> + 'd,
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d0: Peri<'d, impl D0Pin<T>>,
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d1: impl Peripheral<P = impl D1Pin<T>> + 'd,
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d1: Peri<'d, impl D1Pin<T>>,
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ncs: impl Peripheral<P = impl NCS1Pin<T>> + 'd,
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ncs: Peri<'d, impl NCS1Pin<T>>,
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dma: impl Peripheral<P = impl XDma<T>> + 'd,
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dma: Peri<'d, impl XDma<T>>,
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config: Config,
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config: Config,
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) -> Self {
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) -> Self {
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Self::new_inner(
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Self::new_inner(
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@ -962,14 +960,14 @@ impl<'d, T: Instance> Xspi<'d, T, Async> {
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/// Create new blocking XSPI driver for a quadspi external chip
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/// Create new blocking XSPI driver for a quadspi external chip
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pub fn new_quadspi(
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pub fn new_quadspi(
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peri: impl Peripheral<P = T> + 'd,
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peri: Peri<'d, T>,
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clk: impl Peripheral<P = impl CLKPin<T>> + 'd,
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clk: Peri<'d, impl CLKPin<T>>,
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d0: impl Peripheral<P = impl D0Pin<T>> + 'd,
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d0: Peri<'d, impl D0Pin<T>>,
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d1: impl Peripheral<P = impl D1Pin<T>> + 'd,
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d1: Peri<'d, impl D1Pin<T>>,
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d2: impl Peripheral<P = impl D2Pin<T>> + 'd,
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d2: Peri<'d, impl D2Pin<T>>,
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d3: impl Peripheral<P = impl D3Pin<T>> + 'd,
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d3: Peri<'d, impl D3Pin<T>>,
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ncs: impl Peripheral<P = impl NCS1Pin<T>> + 'd,
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ncs: Peri<'d, impl NCS1Pin<T>>,
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dma: impl Peripheral<P = impl XDma<T>> + 'd,
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dma: Peri<'d, impl XDma<T>>,
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config: Config,
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config: Config,
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) -> Self {
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) -> Self {
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Self::new_inner(
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Self::new_inner(
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@ -1007,18 +1005,18 @@ impl<'d, T: Instance> Xspi<'d, T, Async> {
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/// Create new blocking XSPI driver for two quadspi external chips
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/// Create new blocking XSPI driver for two quadspi external chips
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pub fn new_dualquadspi(
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pub fn new_dualquadspi(
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peri: impl Peripheral<P = T> + 'd,
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peri: Peri<'d, T>,
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clk: impl Peripheral<P = impl CLKPin<T>> + 'd,
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clk: Peri<'d, impl CLKPin<T>>,
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d0: impl Peripheral<P = impl D0Pin<T>> + 'd,
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d0: Peri<'d, impl D0Pin<T>>,
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d1: impl Peripheral<P = impl D1Pin<T>> + 'd,
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d1: Peri<'d, impl D1Pin<T>>,
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d2: impl Peripheral<P = impl D2Pin<T>> + 'd,
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d2: Peri<'d, impl D2Pin<T>>,
|
||||||
d3: impl Peripheral<P = impl D3Pin<T>> + 'd,
|
d3: Peri<'d, impl D3Pin<T>>,
|
||||||
d4: impl Peripheral<P = impl D4Pin<T>> + 'd,
|
d4: Peri<'d, impl D4Pin<T>>,
|
||||||
d5: impl Peripheral<P = impl D5Pin<T>> + 'd,
|
d5: Peri<'d, impl D5Pin<T>>,
|
||||||
d6: impl Peripheral<P = impl D6Pin<T>> + 'd,
|
d6: Peri<'d, impl D6Pin<T>>,
|
||||||
d7: impl Peripheral<P = impl D7Pin<T>> + 'd,
|
d7: Peri<'d, impl D7Pin<T>>,
|
||||||
ncs: impl Peripheral<P = impl NCS1Pin<T>> + 'd,
|
ncs: Peri<'d, impl NCS1Pin<T>>,
|
||||||
dma: impl Peripheral<P = impl XDma<T>> + 'd,
|
dma: Peri<'d, impl XDma<T>>,
|
||||||
config: Config,
|
config: Config,
|
||||||
) -> Self {
|
) -> Self {
|
||||||
Self::new_inner(
|
Self::new_inner(
|
||||||
@ -1056,18 +1054,18 @@ impl<'d, T: Instance> Xspi<'d, T, Async> {
|
|||||||
|
|
||||||
/// Create new blocking XSPI driver for xspi external chips
|
/// Create new blocking XSPI driver for xspi external chips
|
||||||
pub fn new_xspi(
|
pub fn new_xspi(
|
||||||
peri: impl Peripheral<P = T> + 'd,
|
peri: Peri<'d, T>,
|
||||||
clk: impl Peripheral<P = impl CLKPin<T>> + 'd,
|
clk: Peri<'d, impl CLKPin<T>>,
|
||||||
d0: impl Peripheral<P = impl D0Pin<T>> + 'd,
|
d0: Peri<'d, impl D0Pin<T>>,
|
||||||
d1: impl Peripheral<P = impl D1Pin<T>> + 'd,
|
d1: Peri<'d, impl D1Pin<T>>,
|
||||||
d2: impl Peripheral<P = impl D2Pin<T>> + 'd,
|
d2: Peri<'d, impl D2Pin<T>>,
|
||||||
d3: impl Peripheral<P = impl D3Pin<T>> + 'd,
|
d3: Peri<'d, impl D3Pin<T>>,
|
||||||
d4: impl Peripheral<P = impl D4Pin<T>> + 'd,
|
d4: Peri<'d, impl D4Pin<T>>,
|
||||||
d5: impl Peripheral<P = impl D5Pin<T>> + 'd,
|
d5: Peri<'d, impl D5Pin<T>>,
|
||||||
d6: impl Peripheral<P = impl D6Pin<T>> + 'd,
|
d6: Peri<'d, impl D6Pin<T>>,
|
||||||
d7: impl Peripheral<P = impl D7Pin<T>> + 'd,
|
d7: Peri<'d, impl D7Pin<T>>,
|
||||||
ncs: impl Peripheral<P = impl NCS1Pin<T>> + 'd,
|
ncs: Peri<'d, impl NCS1Pin<T>>,
|
||||||
dma: impl Peripheral<P = impl XDma<T>> + 'd,
|
dma: Peri<'d, impl XDma<T>>,
|
||||||
config: Config,
|
config: Config,
|
||||||
) -> Self {
|
) -> Self {
|
||||||
Self::new_inner(
|
Self::new_inner(
|
||||||
@ -1296,12 +1294,12 @@ pub(crate) trait SealedInstance {
|
|||||||
/// XSPI instance trait.
|
/// XSPI instance trait.
|
||||||
#[cfg(xspim_v1)]
|
#[cfg(xspim_v1)]
|
||||||
#[allow(private_bounds)]
|
#[allow(private_bounds)]
|
||||||
pub trait Instance: Peripheral<P = Self> + SealedInstance + RccPeripheral + SealedXspimInstance {}
|
pub trait Instance: SealedInstance + PeripheralType + RccPeripheral + SealedXspimInstance {}
|
||||||
|
|
||||||
/// XSPI instance trait.
|
/// XSPI instance trait.
|
||||||
#[cfg(not(xspim_v1))]
|
#[cfg(not(xspim_v1))]
|
||||||
#[allow(private_bounds)]
|
#[allow(private_bounds)]
|
||||||
pub trait Instance: Peripheral<P = Self> + SealedInstance + RccPeripheral {}
|
pub trait Instance: SealedInstance + PeripheralType + RccPeripheral {}
|
||||||
|
|
||||||
pin_trait!(D0Pin, Instance);
|
pin_trait!(D0Pin, Instance);
|
||||||
pin_trait!(D1Pin, Instance);
|
pin_trait!(D1Pin, Instance);
|
||||||
|
|||||||
Loading…
x
Reference in New Issue
Block a user