clocks: split clock and reset operations
Some peripherals need to control clock without touching the reset. Signed-off-by: Felipe Balbi <febalbi@microsoft.com>
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@ -1561,7 +1561,8 @@ pub(crate) unsafe fn init(config: ClockConfig) -> Result<(), ClockError> {
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///Trait to expose perph clocks
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trait SealedSysconPeripheral {
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fn enable_and_reset_perph_clock();
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fn enable_perph_clock();
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fn reset_perph();
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fn disable_perph_clock();
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}
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@ -1574,7 +1575,18 @@ pub trait SysconPeripheral: SealedSysconPeripheral + 'static {}
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///
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/// Peripheral must not be in use.
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pub fn enable_and_reset<T: SysconPeripheral>() {
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T::enable_and_reset_perph_clock();
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T::enable_perph_clock();
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T::reset_perph();
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}
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/// Enables peripheral `T`.
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pub fn enable<T: SysconPeripheral>() {
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T::enable_perph_clock();
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}
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/// Reset peripheral `T`.
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pub fn reset<T: SysconPeripheral>() {
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T::reset_perph();
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}
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/// Disables peripheral `T`.
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@ -1588,15 +1600,21 @@ pub fn disable<T: SysconPeripheral>() {
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macro_rules! impl_perph_clk {
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($peripheral:ident, $clkctl:ident, $clkreg:ident, $rstctl:ident, $rstreg:ident, $bit:expr) => {
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impl SealedSysconPeripheral for crate::peripherals::$peripheral {
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fn enable_and_reset_perph_clock() {
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fn enable_perph_clock() {
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// SAFETY: unsafe needed to take pointers to Rstctl1 and Clkctl1
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let cc1 = unsafe { pac::$clkctl::steal() };
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let rc1 = unsafe { pac::$rstctl::steal() };
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paste! {
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// SAFETY: unsafe due to the use of bits()
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cc1.[<$clkreg _set>]().write(|w| unsafe { w.bits(1 << $bit) });
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}
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}
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fn reset_perph() {
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// SAFETY: unsafe needed to take pointers to Rstctl1 and Clkctl1
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let rc1 = unsafe { pac::$rstctl::steal() };
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paste! {
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// SAFETY: unsafe due to the use of bits()
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rc1.[<$rstreg _clr>]().write(|w| unsafe { w.bits(1 << $bit) });
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}
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@ -1605,12 +1623,8 @@ macro_rules! impl_perph_clk {
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fn disable_perph_clock() {
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// SAFETY: unsafe needed to take pointers to Rstctl1 and Clkctl1
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let cc1 = unsafe { pac::$clkctl::steal() };
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let rc1 = unsafe { pac::$rstctl::steal() };
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paste! {
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// SAFETY: unsafe due to the use of bits()
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rc1.[<$rstreg _set>]().write(|w| unsafe { w.bits(1 << $bit) });
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// SAFETY: unsafe due to the use of bits()
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cc1.[<$clkreg _clr>]().write(|w| unsafe { w.bits(1 << $bit) });
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}
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