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Handle SUBGHZSPI as async.

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This commit is contained in:
ceekdee 2023-05-03 21:05:47 -05:00
parent 6096f0cf4b
commit 629e0ea595
4 changed files with 19 additions and 38 deletions
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11
embassy-stm32/src/spi/mod.rs
View File

@ -195,15 +195,20 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
}
/// Useful for on chip peripherals like SUBGHZ which are hardwired.
/// The bus can optionally be exposed externally with `Spi::new()` still.
#[allow(dead_code)]
pub fn new_subghz(
peri: impl Peripheral<P = T> + 'd,
txdma: impl Peripheral<P = Tx> + 'd,
rxdma: impl Peripheral<P = Rx> + 'd,
freq: Hertz,
config: Config,
pclk3_freq: u32,
) -> Self {
// see RM0453 rev 1 section 7.2.13 page 291
// The SUBGHZSPI_SCK frequency is obtained by PCLK3 divided by two.
// The SUBGHZSPI_SCK clock maximum speed must not exceed 16 MHz.
let freq = Hertz(core::cmp::min(pclk3_freq / 2, 16_000_000));
let mut config = Config::default();
config.mode = MODE_0;
config.bit_order = BitOrder::MsbFirst;
Self::new_inner(peri, None, None, None, txdma, rxdma, freq, config)
}

18
examples/stm32wl/src/bin/lora_lorawan.rs
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@ -7,17 +7,14 @@
#![allow(incomplete_features)]
use defmt::info;
use embassy_embedded_hal::adapter::BlockingAsync;
use embassy_executor::Spawner;
use embassy_lora::iv::Stm32wlInterfaceVariant;
use embassy_lora::LoraTimer;
use embassy_stm32::dma::NoDma;
use embassy_stm32::gpio::{Level, Output, Pin, Speed};
use embassy_stm32::peripherals::SUBGHZSPI;
use embassy_stm32::rcc::low_level::RccPeripheral;
use embassy_stm32::rng::Rng;
use embassy_stm32::spi::{BitOrder, Config as SpiConfig, Spi, MODE_0};
use embassy_stm32::time::Hertz;
use embassy_stm32::spi::Spi;
use embassy_stm32::{interrupt, into_ref, pac, Peripheral};
use embassy_time::Delay;
use lora_phy::mod_params::*;
@ -33,19 +30,14 @@ const LORAWAN_REGION: region::Region = region::Region::EU868; // warning: set th
#[embassy_executor::main]
async fn main(_spawner: Spawner) {
let mut config = embassy_stm32::Config::default();
config.rcc.mux = embassy_stm32::rcc::ClockSrc::HSI16;
config.rcc.enable_lsi = true;
config.rcc.mux = embassy_stm32::rcc::ClockSrc::HSE32;
config.rcc.enable_lsi = true; // enable RNG
let p = embassy_stm32::init(config);
unsafe { pac::RCC.ccipr().modify(|w| w.set_rngsel(0b01)) }
let clk = Hertz(core::cmp::min(SUBGHZSPI::frequency().0 / 2, 16_000_000));
let mut spi_config = SpiConfig::default();
spi_config.mode = MODE_0;
spi_config.bit_order = BitOrder::MsbFirst;
let spi = Spi::new_subghz(p.SUBGHZSPI, NoDma, NoDma, clk, spi_config);
let spi = BlockingAsync::new(spi);
let pclk3_freq = SUBGHZSPI::frequency().0;
let spi = Spi::new_subghz(p.SUBGHZSPI, p.DMA1_CH1, p.DMA1_CH2, pclk3_freq);
let irq = interrupt::take!(SUBGHZ_RADIO);
into_ref!(irq);

14
examples/stm32wl/src/bin/lora_p2p_receive.rs
View File

@ -7,15 +7,12 @@
#![allow(incomplete_features)]
use defmt::info;
use embassy_embedded_hal::adapter::BlockingAsync;
use embassy_executor::Spawner;
use embassy_lora::iv::Stm32wlInterfaceVariant;
use embassy_stm32::dma::NoDma;
use embassy_stm32::gpio::{Level, Output, Pin, Speed};
use embassy_stm32::peripherals::SUBGHZSPI;
use embassy_stm32::rcc::low_level::RccPeripheral;
use embassy_stm32::spi::{BitOrder, Config as SpiConfig, Spi, MODE_0};
use embassy_stm32::time::Hertz;
use embassy_stm32::spi::Spi;
use embassy_stm32::{interrupt, into_ref, Peripheral};
use embassy_time::{Delay, Duration, Timer};
use lora_phy::mod_params::*;
@ -31,13 +28,8 @@ async fn main(_spawner: Spawner) {
config.rcc.mux = embassy_stm32::rcc::ClockSrc::HSE32;
let p = embassy_stm32::init(config);
let clk = Hertz(core::cmp::min(SUBGHZSPI::frequency().0 / 2, 16_000_000));
let mut spi_config = SpiConfig::default();
spi_config.mode = MODE_0;
spi_config.bit_order = BitOrder::MsbFirst;
let spi = Spi::new_subghz(p.SUBGHZSPI, NoDma, NoDma, clk, spi_config);
let spi = BlockingAsync::new(spi);
let pclk3_freq = SUBGHZSPI::frequency().0;
let spi = Spi::new_subghz(p.SUBGHZSPI, p.DMA1_CH1, p.DMA1_CH2, pclk3_freq);
let irq = interrupt::take!(SUBGHZ_RADIO);
into_ref!(irq);

14
examples/stm32wl/src/bin/lora_p2p_send.rs
View File

@ -7,15 +7,12 @@
#![allow(incomplete_features)]
use defmt::info;
use embassy_embedded_hal::adapter::BlockingAsync;
use embassy_executor::Spawner;
use embassy_lora::iv::Stm32wlInterfaceVariant;
use embassy_stm32::dma::NoDma;
use embassy_stm32::gpio::{Level, Output, Pin, Speed};
use embassy_stm32::peripherals::SUBGHZSPI;
use embassy_stm32::rcc::low_level::RccPeripheral;
use embassy_stm32::spi::{BitOrder, Config as SpiConfig, Spi, MODE_0};
use embassy_stm32::time::Hertz;
use embassy_stm32::spi::Spi;
use embassy_stm32::{interrupt, into_ref, Peripheral};
use embassy_time::Delay;
use lora_phy::mod_params::*;
@ -31,13 +28,8 @@ async fn main(_spawner: Spawner) {
config.rcc.mux = embassy_stm32::rcc::ClockSrc::HSE32;
let p = embassy_stm32::init(config);
let clk = Hertz(core::cmp::min(SUBGHZSPI::frequency().0 / 2, 16_000_000));
let mut spi_config = SpiConfig::default();
spi_config.mode = MODE_0;
spi_config.bit_order = BitOrder::MsbFirst;
let spi = Spi::new_subghz(p.SUBGHZSPI, NoDma, NoDma, clk, spi_config);
let spi = BlockingAsync::new(spi);
let pclk3_freq = SUBGHZSPI::frequency().0;
let spi = Spi::new_subghz(p.SUBGHZSPI, p.DMA1_CH1, p.DMA1_CH2, pclk3_freq);
let irq = interrupt::take!(SUBGHZ_RADIO);
into_ref!(irq);