remove jewel dependency
This commit is contained in:
@@ -58,7 +58,7 @@ unstable-pac = []
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gpiote = []
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## Enable radio driver
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radio = ["dep:jewel"]
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radio = []
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## Use RTC1 as the time driver for `embassy-time`, with a tick rate of 32.768khz
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time-driver-rtc1 = ["_time-driver"]
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@@ -153,8 +153,6 @@ embedded-storage-async = "0.4.0"
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cfg-if = "1.0.0"
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document-features = "0.2.7"
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jewel = { version = "0.1.0", git = "https://github.com/jewel-rs/jewel", optional = true }
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nrf51-pac = { version = "0.12.0", optional = true }
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nrf52805-pac = { version = "0.12.0", optional = true }
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nrf52810-pac = { version = "0.12.0", optional = true }
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@@ -17,11 +17,10 @@ use core::task::Poll;
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use embassy_hal_internal::drop::OnDrop;
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use embassy_hal_internal::{into_ref, PeripheralRef};
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use jewel::phy::{Channel, ChannelTrait, HeaderSize, Mode, Radio as BleRadio, CRC_POLY, MAX_PDU_LENGTH};
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use pac::radio::mode::MODE_A as PacMode;
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pub use pac::radio::mode::MODE_A as Mode;
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use pac::radio::pcnf0::PLEN_A as PreambleLength;
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// Re-export SVD variants to allow user to directly set values.
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pub use pac::radio::{state::STATE_A as RadioState, txpower::TXPOWER_A as TxPower};
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use pac::radio::state::STATE_A as RadioState;
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pub use pac::radio::txpower::TXPOWER_A as TxPower;
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use crate::interrupt::typelevel::Interrupt;
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use crate::radio::*;
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@@ -51,11 +50,6 @@ impl<'d, T: Instance> Radio<'d, T> {
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radio: impl Peripheral<P = T> + 'd,
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_irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
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) -> Self {
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// From 5.4.1 of the nRF52840 Product Specification:
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// > The HFXO must be running to use the RADIO or the calibration mechanism associated with the 32.768 kHz RC oscillator.
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// Currently the jewel crate don't implement the calibration mechanism, so we need to ensure that the HFXO is running
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utils::check_xtal();
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into_ref!(radio);
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let r = T::regs();
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@@ -113,18 +107,6 @@ impl<'d, T: Instance> Radio<'d, T> {
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.three()
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});
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r.crcpoly.write(|w| unsafe {
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// Configure the CRC polynomial
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// Each term in the CRC polynomial is mapped to a bit in this
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// register which index corresponds to the term's exponent.
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// The least significant term/bit is hard-wired internally to
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// 1, and bit number 0 of the register content is ignored by
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// the hardware. The following example is for an 8 bit CRC
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// polynomial: x8 + x7 + x3 + x2 + 1 = 1 1000 1101 .
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w.crcpoly().bits(CRC_POLY & 0xFFFFFF)
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});
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// The CRC initial value varies depending of the PDU type
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// Ch map between 2400 MHZ .. 2500 MHz
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// All modes use this range
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r.frequency.write(|w| w.map().default());
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@@ -140,9 +122,7 @@ impl<'d, T: Instance> Radio<'d, T> {
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T::Interrupt::unpend();
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unsafe { T::Interrupt::enable() };
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let mut radio = Self { _p: radio };
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radio
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Self { _p: radio }
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}
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#[allow(dead_code)]
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@@ -186,7 +166,6 @@ impl<'d, T: Instance> Radio<'d, T> {
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trace!("radio drop: stopped");
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});
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/* Config interrupt */
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// trace!("radio:enable interrupt");
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// Clear some remnant side-effects (I'm unsure if this is needed)
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r.events_end.reset();
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@@ -238,34 +217,34 @@ impl<'d, T: Instance> Radio<'d, T> {
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r.events_disabled.reset();
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}
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}
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}
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impl<'d, T: Instance> BleRadio for Radio<'d, T> {
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type Error = Error;
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fn set_mode(&mut self, mode: Mode) {
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/// Set the radio mode
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///
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/// The radio must be disabled before calling this function
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pub fn set_mode(&mut self, mode: Mode) {
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let r = T::regs();
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r.mode.write(|w| {
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w.mode().variant(match mode {
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Mode::Ble1mbit => PacMode::BLE_1MBIT,
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//Mode::Ble2mbit => PacMode::BLE_2MBIT,
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})
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});
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r.mode.write(|w| w.mode().variant(mode));
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r.pcnf0.write(|w| {
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w.plen().variant(match mode {
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Mode::Ble1mbit => PreambleLength::_8BIT,
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//Mode::Ble2mbit => PreambleLength::_16BIT,
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Mode::BLE_1MBIT => PreambleLength::_8BIT,
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Mode::BLE_2MBIT => PreambleLength::_16BIT,
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Mode::BLE_LR125KBIT | Mode::BLE_LR500KBIT => PreambleLength::LONG_RANGE,
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_ => unimplemented!(),
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})
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});
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}
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fn set_header_size(&mut self, header_size: HeaderSize) {
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/// Set the header size changing the S1 field
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///
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/// The radio must be disabled before calling this function
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pub fn set_header_expansion(&mut self, use_s1_field: bool) {
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let r = T::regs();
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let s1len: u8 = match header_size {
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HeaderSize::TwoBytes => 0,
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HeaderSize::ThreeBytes => 8, // bits
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// s1 len in bits
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let s1len: u8 = match use_s1_field {
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false => 0,
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true => 8,
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};
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r.pcnf0.write(|w| unsafe {
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@@ -283,16 +262,36 @@ impl<'d, T: Instance> BleRadio for Radio<'d, T> {
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});
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}
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fn set_channel(&mut self, channel: Channel) {
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/// Set initial data whitening value
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/// Data whitening is used to avoid long sequences of zeros or ones, e.g., 0b0000000 or 0b1111111, in the data bit stream
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/// On BLE the initial value is the channel index | 0x40
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///
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/// The radio must be disabled before calling this function
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pub fn set_whitening_init(&mut self, whitening_init: u8) {
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let r = T::regs();
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r.datawhiteiv.write(|w| unsafe { w.datawhiteiv().bits(whitening_init) });
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}
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/// Set the central frequency to be used
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/// It should be in the range 2400..2500
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///
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/// The radio must be disabled before calling this function
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pub fn set_frequency(&mut self, frequency: u32) {
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assert!(2400 <= frequency && frequency <= 2500);
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let r = T::regs();
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r.frequency
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.write(|w| unsafe { w.frequency().bits((channel.central_frequency() - 2400) as u8) });
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r.datawhiteiv
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.write(|w| unsafe { w.datawhiteiv().bits(channel.whitening_init()) });
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.write(|w| unsafe { w.frequency().bits((frequency - 2400) as u8) });
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}
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fn set_access_address(&mut self, access_address: u32) {
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/// Set the acess address
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/// This address is always constants for advertising
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/// And a random value generate on each connection
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/// It is used to filter the packages
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///
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/// The radio must be disabled before calling this function
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pub fn set_access_address(&mut self, access_address: u32) {
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let r = T::regs();
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// Configure logical address
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@@ -327,44 +326,55 @@ impl<'d, T: Instance> BleRadio for Radio<'d, T> {
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});
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}
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fn set_crc_init(&mut self, crc_init: u32) {
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/// Set the CRC polynomial
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/// It only uses the 24 least significant bits
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///
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/// The radio must be disabled before calling this function
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pub fn set_crc_poly(&mut self, crc_poly: u32) {
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let r = T::regs();
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r.crcpoly.write(|w| unsafe {
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// Configure the CRC polynomial
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// Each term in the CRC polynomial is mapped to a bit in this
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// register which index corresponds to the term's exponent.
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// The least significant term/bit is hard-wired internally to
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// 1, and bit number 0 of the register content is ignored by
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// the hardware. The following example is for an 8 bit CRC
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// polynomial: x8 + x7 + x3 + x2 + 1 = 1 1000 1101 .
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w.crcpoly().bits(crc_poly & 0xFFFFFF)
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});
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}
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/// Set the CRC init value
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/// It only uses the 24 least significant bits
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/// The CRC initial value varies depending of the PDU type
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///
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/// The radio must be disabled before calling this function
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pub fn set_crc_init(&mut self, crc_init: u32) {
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let r = T::regs();
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r.crcinit.write(|w| unsafe { w.crcinit().bits(crc_init & 0xFFFFFF) });
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}
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fn set_tx_power(&mut self, power_db: i8) {
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/// Set the radio tx power
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///
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/// The radio must be disabled before calling this function
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pub fn set_tx_power(&mut self, tx_power: TxPower) {
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let r = T::regs();
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let tx_power: TxPower = match power_db {
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8..=i8::MAX => TxPower::POS8D_BM,
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7 => TxPower::POS7D_BM,
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6 => TxPower::POS6D_BM,
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5 => TxPower::POS5D_BM,
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4 => TxPower::POS4D_BM,
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3 => TxPower::POS3D_BM,
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1..=2 => TxPower::POS2D_BM,
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-3..=0 => TxPower::_0D_BM,
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-7..=-4 => TxPower::NEG4D_BM,
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-11..=-8 => TxPower::NEG8D_BM,
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-15..=-12 => TxPower::NEG12D_BM,
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-19..=-16 => TxPower::NEG16D_BM,
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-29..=-20 => TxPower::NEG20D_BM,
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-39..=-30 => TxPower::NEG30D_BM,
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i8::MIN..=-40 => TxPower::NEG40D_BM,
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};
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r.txpower.write(|w| w.txpower().variant(tx_power));
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}
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fn set_buffer(&mut self, buffer: &[u8]) -> Result<(), Self::Error> {
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/// Set buffer to read/write
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///
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/// This method is unsound. You should guarantee that the buffer will live
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/// for the life time of the transmission or if the buffer will be modified.
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/// Also if the buffer is smaller than the packet length, the radio will
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/// read/write memory out of the buffer bounds.
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pub fn set_buffer(&mut self, buffer: &[u8]) -> Result<(), Error> {
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// Because we are serializing the buffer, we should always have the buffer in RAM
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slice_in_ram_or(buffer, Error::BufferNotInRAM)?;
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if buffer.len() > MAX_PDU_LENGTH {
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return Err(Error::BufferTooLong);
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}
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let r = T::regs();
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// Here we are considering that the length of the packet is
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@@ -379,7 +389,7 @@ impl<'d, T: Instance> BleRadio for Radio<'d, T> {
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}
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/// Send packet
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async fn transmit(&mut self) {
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pub async fn transmit(&mut self) {
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let r = T::regs();
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self.trigger_and_wait_end(move || {
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@@ -390,8 +400,8 @@ impl<'d, T: Instance> BleRadio for Radio<'d, T> {
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.await;
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}
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/// Send packet
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async fn receive(&mut self) {
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/// Receive packet
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pub async fn receive(&mut self) {
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let r = T::regs();
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self.trigger_and_wait_end(move || {
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@@ -29,20 +29,6 @@ impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandl
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}
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}
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pub(crate) mod utils {
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use super::*;
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// Check if the HFCLK is XTAL is enabled
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pub fn check_xtal() {
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// safe: only reading the value
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let is_xtal = unsafe {
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let r = &*pac::CLOCK::ptr();
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r.hfclkstat.read().src().is_xtal()
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};
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assert!(is_xtal, "HFCLK must be XTAL");
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}
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}
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pub(crate) mod sealed {
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use embassy_sync::waitqueue::AtomicWaker;
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